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LTC2209 Datasheet(PDF) 21 Page - Linear Technology |
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LTC2209 Datasheet(HTML) 21 Page - Linear Technology |
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21 / 32 page ![]() LTC2209 21 2209fb The internal programmable gain amplifier provides the internal reference voltage for the ADC. This amplifier has very stringent settling requirements and is not accessible for external use. TheSENSEpincanbedriven±5%aroundthenominal2.5V or 1.25V external reference inputs. This adjustment range can be used to trim the ADC gain error or other system gain errors. When selecting the internal reference, the SENSE pin should be tied to VDD as close to the converter as possible. If the sense pin is driven externally it should be bypassed to ground as close to the device as possible with 1µF ceramic capacitor. Figure 7. A 2.25V Range ADC with an External 2.5V Reference In applications where jitter is critical (high input frequen- cies), take the following into consideration: 1. Differential drive should be used. 2. Use as large an amplitude possible. If using trans- former coupling, use a higher turns ratio to increase the amplitude. 3. If the ADC is clocked with a fixed frequency sinusoidal signal,filtertheencodesignaltoreducewidebandnoise. 4. Balance the capacitance and series resistance at both encode inputs such that any coupled noise will appear at both inputs as common mode noise. The encode inputs have a common mode range of 1.2V to VDD. Each input may be driven from ground to VDD for single-ended drive. PGA Pin The PGA pin selects between two gain settings for the ADC front-end. PGA = 0 selects an input range of 2.25VP- P; PGA = 1 selects an input range of 1.5VP-P. The 2.25V input range has the best SNR; however, the distortion will be higher for input frequencies above 100MHz. For ap- plications with high input frequencies, the low input range will have improved distortion; however, the SNR will be 1.8dB worse. See the typical performance curves section. Driving the Encode Inputs The noise performance of the LTC2209 can depend on the encode signal quality as much as for the analog input. The encode inputs are intended to be driven differentially, primarily for noise immunity from common mode noise sources. Each input is biased through a 6k resistor to a 1.6V bias. The bias resistors set the DC operating point for transformer coupled drive circuits and can set the logic threshold for single-ended drive circuits. Any noise present on the encode signal will result in ad- ditional aperture jitter that will be RMS summed with the inherent ADC aperture jitter. Figure 8a. Equivalent Encode Input Circuit Figure 8b. Transformer Driven Encode applications inForMation VCM SENSE 1.25V 3.3V 2.2µF 2.2µF 1µF 2209 F07 LTC2209 LTC1461-2.5 2 6 4 VDD VDD LTC2209 2209 F08a VDD ENC– ENC+ 1.6V 1.6V 6k 6k TO INTERNAL ADC CLOCK DRIVERS 50Ω 100Ω 8.2pF 0.1µF 0.1µF 0.1µF T1 T1 = MA/COM ETC1-1-13 RESISTORS AND CAPACITORS ARE 0402 PACKAGE SIZE 5Ω LTC2209 2209 F08b ENC– ENC+ |
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