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RF5112

DS110617

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical

support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.

Pin

Function

Description

Interface Schematic

1NC

Not connected. May be connected to ground (GND).

2RF IN

RF input. See evaluation board schematic for details.

3RF IN

RF input. See evaluation board schematic for details.

See pin 2.

4NC

Not connected. May be connected to ground (GND).

5NC

Do not connect.

Note: VCC voltage may be applied to this pin without damage to, or affect-

ing the performance of, the RF5112.

6VREG1

Bias current control voltage for the first stage.

7VREG2

Bias current control voltage for the second stage. The VREG2 pin may be

connected to VREG1 through an external resistor bridge.

8PDETECT (or

N/C*)

Provides an output voltage proportional to the output RF level.

*In applications where the PDETECT function is not desired, this pin may

be left unconnected.

9NC

No-connect.

10

RF OUT

RF output.

11

RF OUT

Same as pin 10.

See pin 10.

12

VCC2

Power supply for second stage amplifier. Connect as shown on evaluation

board schematic.

13

NC

Not connected. May be connected to ground (GND).

14

VCC1

Power supply for first stage amplifier. Connect as shown on evaluation

board schematic.

15

NC

Not connected. May be connected to ground (GND).

16

VCC B

Supply voltage for the bias reference and control circuits. May be con-

nected with VC1 and VC2 (single-supply voltage).

Pkg

Base

GND

The center metal base of the QFN package provides DC and RF ground as

well as heat sink for the amplifier.

INPUT

MATCH

VCC

INTERSTAGE

MATCH

RF OUT

BIAS