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RF5322

DS110618

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical

support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.

Package Drawing

Pin

Function

Description

Interface Schematic

1RF IN

RF input. Input is matched to 50

 and DC block is provided internally.

2VREG

Bias current control voltage for the first and second amplifier stage.

3PDETECT

Power detector which provides an output voltage proportional to the RF

output power level. May need external decoupling capacitor for stability.

May need external circuitry to bring output voltage to desired level.

4N/C

Must be left as no connect, not grounded.

5RF OUT

RF output. Output is matched to 50

 and DC block is provided internally.

6VC2

Voltage supply for the second amplifier stage.

7VC1

Voltage supply for the first amplifier stage.

8VCC

Supply voltage for the bias reference and control circuit. May be connected

Pkg

Base

GND

The center metal base of the QFN package provides DC and RF ground as

well as heat sink for the amplifier.

VCC

Input

Match

Interstage

Match

VCC2

Output

Match

RF OUT

0.05

0.00

0.152

REF

0.50

0.40

-C-

SEATING

PLANE

INDEX

AREA

-B-

-A-

2.20

2.20

2 PLCS

0.10 C

2 PLCS

0.10 C

0.10

MAX

C AB

0.10 M

0.31

0.21

0.65

0.28

0.18

1.20

1.00

TYP

Dimensions in mm.

Shaded lead is pin 1.