RF Micro Devices Inc.

7628 Thorndike Road, Greensboro, NC 27409-9421

DS140530

For sales or technical support, contact RFMD at +1.336.678.5570 or customerservice@rfmd.com.

The information in this publication is believed to be accurate. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents or other rights of

third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended

application circuitry and specifications at any time without prior notice.

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RFAC3612

Test Set-up

The RFAC3612 is controlled by a single direction 3-wire SPI compatible interface. The RFAC3612 has 3 logic input pins for:

SCLK: Serial Input, SDATA: Serial Data Input; CS: Chip Select

The serial master initiates the start of the telegram by driving the chip select signal CS low. Each bit in the 16-bit telegram is clocked in by

the slave on the falling edge of SCLK.

SDATA bits consist of 3 groups:

F0 to F7: are fixed bits, these do not change.

S0 to S1: controls the RF1 and RF2 shunt switches

D5 to D0: is the 6-bit data word, used for controlling the PAC. SDATA bits are clocked in the order shown below, with D5 being the first

bit. The PAC activates the clocked values of SDATA on the falling edge of SCLK of the 16

MSB

LSB

F6

F5

F4

F2

F3

F7

SCLK

SDATA

CS

F1

F0

S1

D5

S0

D4

D3

D2

D0

D1

A quick overview of the telegram bits is shown below.

Telegram Bits

Function and Description

F0-F7

8-bit set of fixed bits, must be set to 00100000

S1

Data bit S1, controls shunt switch on port RF2. 0 = shunt switch is Off, 1 = shunt switch is On. After power-up

the value of S1 is 0, i.e. shunt switch is Off.

S0

Data bit S0, controls shunt switch on port RF1. 0 = shunt switch is Off, 1 = shunt switch is On. After power-up

the value of S0 is 0, i.e. shunt switch is Off.

D0-D5

Data bit D0-D5, controls the state of PAC. (D5 is most significant bit, D0 is least significant bit). After power-

up the value of D0-D5 is 000000, i.e. state 0.