RF Micro Devices Inc.

7628 Thorndike Road, Greensboro, NC 27409-9421

DS140530

For sales or technical support, contact RFMD at +1.336.678.5570 or customerservice@rfmd.com.

The information in this publication is believed to be accurate. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents or other rights of

third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended

application circuitry and specifications at any time without prior notice.

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RFAC3612

Parameter

Specification

Unit

Condition

Min

Typ

Max

Falling Edge of SCLK to Rising Edge of CS

20

ns

3-Wire Interface Timing

Characteristics

– Cont.

SDATA to Falling Edge of SCLK Set-up Time

10

ns

SDATA Hold Time After Falling Edge of

10

ns

CS High Time for Activation of Programmed

100

ns

NOTES:

1.

RF1 and RF2 ports are internally DC coupled and should not have any non-zero DC bias voltage during operation.

2.

3.

Corresponds to a minimum clock cycle time of 38.5ns.