1- to 3-Cell, High-Current, Low-Noise,

Step-Up DC-DC Converters with Linear Regulator

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11

Step-Up Converter

The step-up switching DC-DC converter generates an

adjustable output to supply both power circuitry (such

as RF power amplifiers) and the internal low-dropout

linear regulator. During the first part of each cycle, the

internal N-channel MOSFET switch is turned on. This

allows current to ramp up in the inductor and store

energy in a magnetic field. During the second part of

each cycle, when the MOSFET is turned off, the voltage

across the inductor reverses and forces current

through the diode and synchronous rectifier to the out-

put filter capacitor and load. As the energy stored in

the inductor is depleted, the current ramps down, and

the output diode and synchronous rectifier turn off.

Voltage across the load is regulated using either PWM

or PFM operation, depending on the CLK/SEL pin set-

ting (Table 1).

Low-Noise, High-Power PWM Operation

When CLK/SEL is pulled high, the MAX1705/MAX1706

operate in a high-power, low-noise PWM mode. During

PWM operation, they switch at a constant frequency

(300kHz), and modulate the MOSFET switch pulse

width to control the power transferred per cycle and

regulate the voltage across the load. In PWM mode, the

devices can output up to 850mA. Switching harmonics

generated by fixed-frequency operation are consistent

and easily filtered.

During PWM operation, each of the internal clock’s ris-

ing edges sets a flip-flop, which turns on the N-channel

MOSFET switch (Figure 3). The switch is turned off

when the sum of the voltage-error and current-

feedback signals trips a multi-input comparator and

resets the flip-flop; the switch remains off for the rest of

the cycle. When a change occurs in the output voltage

error signal into the comparator, it shifts the level that

the inductor current is allowed to ramp to during each

cycle and modulates the MOSFET switch pulse width.

A second comparator enforces a 1.55A (max) inductor-

LX

POUT

OUT

BOOST OUTPUT 3.6V

FB

LDO OUTPUT 3.3V

INPUT 0.9V TO 3.6V

(TO PGND)

(TO PGND)

PGND

GND

LDO

FBLDO

LBO

LBN

REF

MAX1705

MAX1706

LBP

CLK/SEL

ONA

ONB

TRACK

R3

165k

R4

100k

R5

R6

R7

100k

C2*

D1

C7

22

µF

C8

0.33

µF

L1 10

µH (22µH)

*OPTIONAL.

( ) ARE FOR MAX1706.

C4

220

µF

(100

µF)

C5*

0.33

µF

C6

22

µF

R1

191k

C3

0.1

µF

C9

0.33

µF

C1*

R2

100k

NOTE: HEAVY LINES INDICATE HIGH-CURRENT PATH.

Figure 2. Typical Operating Circuit (PWM Mode)

CLK/SEL

MODE

FEATURES

0

PFM

Low supply current

1

PWM

Low noise,

high output current

External Clock

(200kHz to 400kHz)

Synchronized

PWM

Low noise,

high output current

Table 1. Selecting the Operating Mode