9DB1233

Twelve Output Differential Buffer for PCIe Gen3

13

1675B—11/08/10

SMBus Table: Output Enable Readback

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

Reserved

Reserved

R

0

Bit 6

Reserved

Reserved

R

0

Bit 5

Reserved

Reserved

R

0

Bit 4

Reserved

Reserved

R

0

Bit 3

OE11#

Output Control (Disable = Hi-Z)

R

Enabled

Disabled

X

Bit 2

OE10#

Output Control (Disable = Hi-Z)

R

Enabled

Disabled

X

Bit 1

OE9#

Output Control (Disable = Hi-Z)

R

Enabled

Disabled

X

Bit 0

OE8#

Output Control (Disable = Hi-Z)

R

Enabled

Disabled

X

Note: For an output to be enabled, BOTH the Output Enable Bit and the OE# pin must be enabled.

This means that the Output Enable Bit must be '1' and the corresponding OE# pin must be '0'.

SMBus Table: Vendor & Revision ID Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

RID3

R

-

-

0

Bit 6

RID2

R

-

-

0

Bit 5

RID1

R

-

-

1

Bit 4

RID0

R

-

-

0

Bit 3

VID3

R

-

-

0

Bit 2

VID2

R

-

-

0

Bit 1

VID1

R

-

-

0

Bit 0

VID0

R

-

-

1

SMBus Table: DEVICE ID

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

RW

1

Bit 6

RW

1

Bit 5

RW

0

Bit 4

RW

0

Bit 3

RW

0

Bit 2

RW

0

Bit 1

RW

0

Bit 0

RW

0

SMBus Table: Byte Count Register

Pin #

Name

Control Function

Type

0

1

Default

Bit 7

BC7

RW

-

-

0

Bit 6

BC6

RW

-

-

0

Bit 5

BC5

RW

-

-

0

Bit 4

BC4

RW

-

-

0

Bit 3

BC3

RW

-

-

0

Bit 2

BC2

RW

-

-

1

Bit 1

BC1

RW

-

-

1

Bit 0

BC0

RW

-

-

1

-

Reserved

Reserved

-

Reserved

Byte 5

50,51

45,46

-

-

REVISION ID

-

-

-

-

VENDOR ID

-

-

-

-

-

-

-

-

Byte 6

-

-

-

Byte 7

-

Writing to this register configures how

many bytes will be read back.

-

-

-

-

-

-

-

Device ID 1

Device ID 6

Device ID 7 (MSB)

Device ID is C0 Hex

Device ID 5

Device ID 4

Device ID 3

Device ID 0

Device ID 2

Reserved

58,59

53,54

Byte 4

-