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9DB1233 Datasheet(PDF) 8 Page - Integrated Circuit Systems |
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9DB1233 Datasheet(HTML) 8 Page - Integrated Circuit Systems |
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8 / 15 page ![]() IDT® Twelve Output Differential Buffer for PCIe Gen3 9DB1233 Twelve Output Differential Buffer for PCIe Gen3 8 1675B—11/08/10 Clock Periods Differential Outputs with Spread Spectrum Enabled 1 Clock 1us 0.1s 0.1s 0.1s 1us 1 Clock Lg- -SSC -ppm error 0ppm + ppm error +SSC Lg+ Absolute Period Short-term Average Long-Term Average Period Long-Term Average Short-term Average Period Minimum Absolute Period Minimum Absolute Period Minimum Absolute Period Nominal Maximum Maximum Maximum DIF DIF 100 9.87400 9.99900 9.99900 10.00000 10.00100 10.05130 10.17630 ns 1,2,3 Clock Periods Differential Outputs with Spread Spectrum Disabled 1 Clock 1us 0.1s 0.1s 0.1s 1us 1 Clock Lg- -SSC -ppm error 0ppm + ppm error +SSC Lg+ Absolute Period Short-term Average Long-Term Average Period Long-Term Average Short-term Average Period Minimum Absolute Period Minimum Absolute Period Minimum Absolute Period Nominal Maximum Maximum Maximum DIF DIF 100 9.87400 9.99900 10.00000 10.00100 10.17630 ns 1,2,3 1Guaranteed by design and characterization, not 100% tested in production. 3 Driven by SRC output of main clock, PLL or Bypass mode Measurement Window Symbol 2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK410B+/CK420BQ accuracy requirements. The 9DB1233 itself does not contribute to ppm error. Notes Notes Definition Measurement Window Units Symbol Definition Units |
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