HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR

S-1323 Series

Seiko Instruments Inc.

9



Standard Circuit

ON/OFF

VSS

VOUT

VIN

*1

*2

Input

Output

GND

Single GND

*2. A ceramic capacitor of 1.0

Figure 10

Caution The above connection diagram and constant will not guarantee successful operation.

Perform thorough evaluation using the actual application to set the constant.



Condition of Application

1.0

μF or more

1.0

μF or more

ESR of output capacitor:

10

Ω or less

Caution Generally a series regulator may cause oscillation, depending on the selection of external

parts. Check that no oscillation occurs with the application using the above capacitor.