_____________Layout Considerations

SRT and SWT are precision current sources. When

developing the layout for the application, be careful to

minimize board capacitance and leakage currents

around these pins. Traces connected to these pins

should be kept as short as possible. Traces carrying

high-speed digital signals and traces with large voltage

potentials should be routed as far from these pins as

possible. Leakage currents and stray capacitance (e.g.,

a scope probe) at these pins could cause errors in the

reset and/or watchdog timeout period. When evaluating

these parts, use clean prototype boards to ensure accu-

rate reset and watchdog timeout periods.

RESET IN is a high-impedance input which is typically

driven by a high-impedance resistor-divider network

(e.g., 1M

Ω to 10MΩ). Minimize coupling to transient

signals by keeping the connections to this input short.

Any DC leakage current at RESET IN (e.g., a scope

probe) causes errors in the programmed reset thresh-

old. Note that sensitive pins are located on the GND

side of the device, away from the digital I/O, to simplify

board layout.

___________________Chip Information

+5V, Low-Power µP Supervisory Circuits

with Adjustable Reset/Watchdog

______________________________________________________________________________________

11

__Ordering Information (continued)

PART

MAX6302CPA

MAX6302CSA

MAX6302CUA

0°C to +70°C

0°C to +70°C

0°C to +70°C

TEMP. RANGE

PIN-PACKAGE

8 Plastic DIP

8 SO

8 µMAX

MAX6302EPA

MAX6302ESA

-40°C to +85°C

-40°C to +85°C

8 Plastic DIP

8 SO

MAX6303CPA

0°C to +70°C

8 Plastic DIP

MAX6303CSA

0°C to +70°C

8 SO

MAX6303CUA

0°C to +70°C

8 µMAX

MAX6303EPA

-40°C to +85°C

8 Plastic DIP

MAX6303ESA

-40°C to +85°C

8 SO

MAX6304CPA

0°C to +70°C

8 Plastic DIP

MAX6304CSA

0°C to +70°C

8 SO

MAX6304CUA

0°C to +70°C

8 µMAX

MAX6304EPA

-40°C to +85°C

8 Plastic DIP

MAX6304ESA

-40°C to +85°C

8 SO

TRANSISTOR COUNT: 580