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MAX9372ESA Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX9372ESA Datasheet(HTML) 3 Page - Maxim Integrated Products |
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3 / 9 page ![]() LVTTL/TTL-to-Differential LVPECL/PECL Translators _______________________________________________________________________________________ 3 DC ELECTRICAL CHARACTERISTICS (continued) (VCC = 3.0V to 5.25V for MAX9370/MAX9371, VCC = 3.0V to 3.6V for MAX9372, outputs terminated with 50 Ω ±1% to VCC - 2.0V. Typical values are at VCC = 3.3V, VIH = 2.4V, VIL = 0.4V, unless otherwise noted.) (Notes 1, 2, 3) -40°C +25°C +85°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Differential Output Swing (VOH - VOL) 600 600 600 mV SUPPLY CURRENT MAX9370/ MAX9372 18 28 20 28 22 28 Power-Supply Current (Note 4) ICC MAX9371 9.5 16 10.5 16 11.5 16 mA AC ELECTRICAL CHARACTERISTICS (VCC = 3.0V to 5.25V for MAX9370/MAX9371, VCC = 3.0V to 3.6V for MAX9372, outputs terminated with 50 Ω ±1% to VCC - 2.0V, input frequency ≤ 1.0GHz, input transition time = 125ps (20% to 80%), VIH = 2.0V, VIL = 0.8V. Typical values are at VCC = 3.3V, VIH = 2.4V, VIL = 0.4V, unless otherwise noted.) (Note 5) -40°C +25°C +85°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Maximum Toggle Frequency fMAX VOH - VOL ≥ 600mV 1.0 1.5 1.0 1.5 1.0 1.5 GHz Input-to- Output Propagation Delay tPLH, tPHL Figure 1 200 270 400 200 270 400 200 270 400 ps Output-to- Output Skew tSKQQ MAX9370/ MAX9372 (Note 6) 10 50 7 50 7 50 ps Output Rise/ Fall Time tR, tF Figure 1 80 250 80 250 80 250 ps Added Deterministic Jitter tDJ 1Gbps 2 23 - 1 PRBS pattern (Note 7) 40 60 40 60 40 60 ps(P-P) Added Random Jitter tRJ 1GHz clock (Note 7) 0.23 0.8 0.23 0.8 0.23 0.8 ps(RMS) Note 1: Measurements are made with the device in thermal equilibrium. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters are production tested at TA = +25°C. DC limits are guaranteed by design and characterization over the full operating temperature range. Note 4: All pins are open except VCC and GND. Note 5: Guaranteed by design and characterization. Limits are set to ±6 sigma. Note 6: Measured between outputs of the same part at the signal crossing points under identical conditions for a same-edge transition. Note 7: Device jitter added to the input signal. |
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