AM1806 datasheet(68/245 Pages) TI

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OSCIN

RESET

RESETOUT

Boot Pins

Config

Power

Supplies

Ramping

Power Supplies Stable

Clock Source Stable

TRST

AM1806

SPRS658F – FEBRUARY 2010 – REVISED MARCH 2014

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6.4.3

Reset Electrical Data Timings

Table 6-1 assumes testing over the recommended operating conditions.

Table 6-1. Reset Timing Requirements ((1), (2))

1.3V, 1.2V

1.1V

1.0V

NO.

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

tw(RSTL)

Pulse width, RESET/TRST low

100

tsu(BPV-RSTH)

Setup time, boot pins valid before RESET/TRST high

th(RSTH-BPV)

Hold time, boot pins valid after RESET/TRST high

td(RSTH-

RESET high to RESETOUT high; Warm reset

4096

cycles(3)

RESETOUTH)

RESET high to RESETOUT high; Power-on Reset

6169

td(RSTL-

Delay time, RESET/TRST low to RESETOUT low

RESETOUTL)

(1)

RESETOUT is multiplexed with other pin functions. See the Terminal Functions table, Table 3-3 for details.

(2)

For power-on reset (POR), the reset timings in this table refer to RESET and TRST together. For warm reset, the reset timings in this

table refer to RESET only (TRST is held high).

(3)

OSCIN cycles.

Figure 6-4. Power-On Reset (RESET and TRST active) Timing

Peripheral Information and Electrical Specifications

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