AM4376 datasheet(2/261 Pages) TI

2 / 261 page

AM4376, AM4377, AM4378, AM4379

SPRS851B – JUNE 2014 – REVISED APRIL 2015

www.ti.com

•

8KB (PRU-ICSS1), 4KB (PRU-ICSS0) of

– Real-Time Date (Day, Month, Year, and Day of

Data RAM With Single-Error Detection

Week) and Time (Hours, Minutes, and Seconds)

(Parity)

Information

– Internal 32.768-kHz Oscillator, RTC Logic, and

•

Single-Cycle 32-Bit Multiplier With 64-Bit

1.1-V Internal LDO

Accumulator

– Independent Power-On-Reset

•

Enhanced GPIO Module Provides Shift-In

(RTC_PWRONRSTn) Input

and Shift-Out Support and Parallel Latch on

External Signal

– Dedicated Input Pin (RTC_WAKEUP) for

External Wake Events

– 12KB (PRU-ICSS1 Only) of Shared RAM With

Single-Error Detection (Parity)

– Programmable Alarm Can Generate Internal

Interrupts to the PRCM for Wakeup or Cortex-

– Three 120-Byte Register Banks Accessible by

A9 for Event Notification

Each PRU

– Programmable Alarm Can Be Used With

– Interrupt Controller Module (INTC) for Handling

External Output (RTC_PMIC_EN) to Enable the

System Input Events

Power-Management IC to Restore Non-RTC

– Local Interconnect Bus for Connecting Internal

Power Domains

and External Masters to the Resources Inside

• Peripherals

the PRU-ICSS

– Up to Two USB 2.0 High-Speed Dual-Role

– Peripherals Inside the PRU-ICSS

(Host or Device) Ports With Integrated PHY

•

One UART Port With Flow Control Pins,

– Up to Two Industrial Gigabit Ethernet MACs

Supports up to 12 Mbps

(10, 100, and 1000 Mbps)

•

One eCAP Module

•

Integrated Switch

•

Two MII Ethernet Ports that Support

•

Each MAC Supports MII, RMII, and RGMII

Industrial Ethernet, such as EtherCAT

and MDIO Interfaces

•

One MDIO Port

•

Ethernet MACs and Switch Can Operate

– Industrial Communication is Supported by Two

Independent of Other Functions

PRU-ICSS Subsystems

•

IEEE 1588v2 Precision Time Protocol (PTP)

• Power Reset and Clock Management (PRCM)

– Up to Two Controller Area Network (CAN) Ports

Module

•

Supports CAN Version 2 Parts A and B

– Controls the Entry and Exit of Deep-Sleep

Modes

– Up to Two Multichannel Audio Serial Ports

(McASPs)

– Responsible for Sleep Sequencing, Power

Domain Switch-Off Sequencing, Wake-Up

•

Transmit and Receive Clocks up to 50 MHz

Sequencing, and Power Domain Switch-On

•

Up to Four Serial Data Pins Per McASP Port

Sequencing

With Independent TX and RX Clocks

– Clocks

•

Supports Time Division Multiplexing (TDM),

•

Integrated High-Frequency Oscillator Used

Inter-IC Sound (I2S), and Similar Formats

to Generate a Reference Clock (19.2, 24, 25,

•

Supports Digital Audio Interface

and 26 MHz) for Various System and

Transmission (SPDIF, IEC60958-1, and

Peripheral Clocks

AES-3 Formats)

•

Supports Individual Clock Enable and

•

FIFO Buffers for Transmit and Receive

Disable Control for Subsystems and

(256 Bytes)

Peripherals to Facilitate Reduced Power

– Up to Six UARTs

Consumption

•

All UARTs Support IrDA and CIR Modes

•

Five ADPLLs to Generate System Clocks

•

All UARTs Support RTS and CTS Flow

(MPU Subsystem, DDR Interface, USB, and

Control

Peripherals [MMC and SD, UART, SPI, I2C],

•

UART1 Supports Full Modem Control

L3, L4, Ethernet, GFX [SGX530], and LCD

– Up to Five Master and Slave McSPI Serial

Pixel Clock)

Interfaces

– Power

•

McSPI0-McSPI2 Supports up to Four Chip

•

Two Nonswitchable Power Domains (RTC

Selects

and Wake-Up Logic [WAKE-UP])

•

McSPI3-McSPI4 Supports up to Two Chip

•

Three Switchable Power Domains (MPU

Selects

Subsystem, SGX530 (GFX), Peripherals and

•

Up to 48 MHz

Infrastructure (PER))

– One Quad-SPI

•

Dynamic Voltage Frequency Scaling (DVFS)

•

Supports eXecute In Place (XIP) from Serial

• Real-Time Clock (RTC)

Device Overview

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Product Folder Links: AM4376 AM4377 AM4378 AM4379

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