DM385 datasheet(92/281 Pages) TI

92 / 281 page

DM385, DM388

SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

www.ti.com

3.3.20 Supply Voltages

Table 3-45. Supply Voltages Terminal Functions

SIGNAL NAME [1]

DESCRIPTION [2]

TYPE [3]

AAR BALL [4]

CVDD

Variable Voltage Supply for the CORE_L Core Logic

PWR

P15, P17, R15, R17,

Voltage Domain

T13, T17, T18, U11,

U12, U15, U17, V11,

V12, V15, V17, W13,

W14, W19, W20, Y13,

Y14, Y19, Y20

CVDD_ARM

Variable Voltage Supply for the ARM_L Core Logic

PWR

K17, L17, L18, M13,

Voltage Domain. For actual voltage supply ranges, see

M14, M17

Recommended Operating Conditions.

CVDD_HDVICP

Variable Voltage Supply for the HDVICP_L Core Logic

PWR

U20, U21, V20, V21,

Voltage Domain. For actual voltage supply ranges, see

W22

Recommended Operating Conditions.

DVDD

3.3 V/1.8 V Power Supply for General I/Os

PWR

D16, E17, F16, L5,

M4, M6, M7, N10,

N11, T26, T28, U27

DVDD_C

3.3 V/1.8 V Power Supply for Camera I/F I/Os. For proper PWR

D12, E13, F12, G12,

device operation, this pin must always be connected to a

G13

DVDD Power Supply, even if the Camera I/F is not being

used.

DVDD_DDR[0]

1.35 V/1.5 V/1.8 V Power Supply for DDR[0] I/Os

PWR

AB14, AB15, AB17,

AB18, AC15, AC17,

AC18, AE15, AE16,

AF16, AG15, AH16

DVDD_GPMC

3.3 V/1.8 V Power Supply for GPMC I/Os. For proper

PWR

R5, R7, T4, T6, T7

device operation, this pin must always be connected to a

DVDD Power Supply, even if the GPMC is not being

used.

DVDD_RGMII

3.3 V/1.8 V Power Supply for RGMII I/Os. For proper

PWR

W5, W7, Y4, Y6, Y7

device operation, this pin must always be connected to a

DVDD Power Supply, even if the RGMII is not being

used.

DVDD_SD

3.3 V/1.8 V Power Supply for MMC/SD/SDIO I/Os. For

PWR

T25, U25

proper device operation, this pin must always be

connected to a DVDD Power Supply, even if the interface

is not being used.

LDOCAP_ARM

ARM Cortex-A8 VBB LDO output. This pin must always

J19

be connected via a 1-uF capacitor to VSS.

LDOCAP_ARMRAM

ARM Cortex-A8 RAM LDO output. This pin must always

K20

be connected via a 1-uF capacitor to VSS.

LDOCAP_HDVICP

HDVICP2 VBB LDO output.This pin must always be

W23