NJM3776

Figure 7. Stepping modes

V

R1

Dis

1

Phase

1

Phase

2

Dis

2

I

MA1

I

MA2

100%

–100%

–100%

100%

Full step mode

Half step mode

Modified half step mode

V

R2

140%

100%

140%

100%

140%

–140%

140%

–140%

Current sense filtering

At turn-on a current transient occurs, due to the recovery of the recirculation diodes and the capacitance of the

motor winding. To prevent this transient from reseting the flip-flops through the current sensing comparators, the

clock oscillator generates a blanking pulse at turn-on. The blanking pulse disables the comparators for a short time.

Thereby preventing any voltage transient across the sensing resistor from reseting the flip-flop during the time

blanking.

Select the blanking pulse time to be longer than the duration of the switching transients by selecting a proper C

T

value. The time is calculated as:

t

As the C

33 000 pF, a blanking time ranging from 0.5

µs to 7 µs is

possible. Nominal value is 4 700 pF, which gives a blanking time of 1.0

µs.

As the filtering action introduces a small delay, the peak value across the sensing resistor, and hence the peak

motor current, will reach a slightly higher level than what is defined by the reference voltage. The filtering delay

also limits the minimum possible output current. As the output will be on for a short time each cycle, equal to the

digital filtering blanking time plus additional internal delays, a small amount of current will flow through the winding.

Typically this current is 1-10 % of the maximum output current set by R

When optimizing low current performance, the filtering may be done by adding an external low pass filter in series

with the comparator C input, see figure 6. In this case the digital blanking time should be as short as possible. The

recommended filter component values are 1 kohm and 1000 pF. The transient may be reduced by adding external

recircula-ting diodes. These diodes should be of the fast switching type. By doing this the filter delay will be mini-

mized. Lowering the switching frequency also helps reduce the minimum output current.

It is recommended to add the resistor R8 in the feedback loop in order to prevent the switching transient from

damaging the C inputs. See figure 6.

To create an absolute zero current, the Dis input should be HIGH.

Switching frequency

The frequency of the clock oscillator is set by the timing components R

filter blanking time, the clock oscillator frequency is adjusted by R

frequency is approximately calculated as:

f

Nominal component values of 12 kohm and 4 700 pF results in a clock frequency of 23.0 kHz. A lower frequency

will result in higher current ripple, but may improve low level linearity. A higher clock frequency reduces current

ripple, but increases the switching losses in the IC and possibly the iron losses in the motor.

Figure 8. Truth table

All four off

All four off

Disable

Phase

01

0

1