MIC284 datasheet(12/20 Pages) MICREL

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MIC284

Micrel

MIC284

September 29, 2000

If the device is shut down while in interrupt mode (mode = 1),

the /INT pin will be unconditionally de-asserted and the

internal latches holding the interrupt status will be cleared.

Therefore, no interrupts will be generated while the MIC284

is in shutdown mode, and the interrupt status will not be

retained. Regardless of the setting of the MODE bit, the state

of /CRIT and its corresponding status bit, CRIT1, does not

change when the MIC284 enters shutdown mode. They will

retain their states until after the device exits shutdown mode

and resumes A/D conversions. Since entering shutdown

mode stops A/D conversions, the MIC284 is incapable of

detecting or reporting temperature events of any kind while in

shutdown. Diode fault detection requires one or more A/D

conversion cycles to detect external sensor faults, therefore

diode faults will not be reported until the MIC284 exits

shutdown (see "Diode Faults" above).

Fault Queues

Fault queues (programmable digital filters) are provided in

the MIC284 to prevent false tripping due to thermal or

electrical noise. The two bits in CONFIG[4:3] set the depth of

Fault_Queue. Fault_Queue then determines the number of

consecutive temperature events (TEMPx > T_SETx, TEMPx

< T_HYSTx, TEMP1 > CRIT1, or TEMP1 < nCRIT1) which

must occur in order for the condition to be considered valid.

There are separate fault queues for each zone and for the

over-temperature detect function. As an example, assume

the part is in comparator mode, and CONFIG[4:3] is pro-

grammed with 10

b. The measured temperature in zone one

would have to exceed T_SET1 for four consecutive A/D

conversions before /INT would be asserted or the S1 status

bit set. Similarly, TEMP1 would have to be less than T_HYST1

for four consecutive conversions before /INT would be reset.

Like any filter, the fault queue function also has the effect of

delaying the detection of temperature events. In this ex-

ample, it would take 4 x t

CONV to detect a temperature event.

The depth of Fault_Queue vs. D[4:3] of the configuration

]

[

Table 4. Fault_Queue Depth Settings

Interrupt Generation

Assuming the MIC284 is in interrupt mode and interrupts are

enabled, there are five different conditions that will cause the

MIC284 to set one of the status bits (S0, S1, or CRIT1) in

CONFIG and assert the /INT output and/or the /CRIT output.

These conditions are listed in Table 5. When a temperature

event occurs, the corresponding status bit will be set in

CONFIG.

This action cannot be masked.

However, a

temperature event will only generate an interrupt signal on /

INT if it is specifically enabled by the interrupt mask bit (IM =0

in the configuration register). Following an interrupt, the host

should read the contents of the configuration register to

confirm that the MIC284 was the source of the interrupt. A

read operation on

any register will cause /INT to be de-

asserted. This is shown in Figure 5. The status bits will be

cleared once CONFIG has been read.

Since temperature-to-digital conversions continue while /INT

is asserted, the measured temperature could change be-

tween the MIC284’s assertion of /INT or /CRIT and the host’s

response. It is good practice for the interrupt service routine

to read the value in TEMPx, to verify that the over-tempera-

ture or under-temperature condition still exists. In addition,

more than one temperature event may have occurred simul-

taneously or in rapid succession between the assertion of

/INT and servicing of the MIC284 by the host. The interrupt

service routine should allow for this eventuality. Keep in mind

that clearing the status bits and deasserting /INT is

not

sufficient to allow further interrupts to occur. TEMPx must

become less than T_HYSTx if the last event was an over-

temperature condition, or greater than T_SETx if the last

event was an under-temperature condition, before /INT can

be asserted again.

Putting the device into shutdown mode will de-assert /INT

and clear the S0 and S1 status bits. This should not be done

before completing the appropriate interrupt service routine(s).

/CRIT Output

If and when the measured remote temperature exceeds the

value programmed into the CRIT1 register, the /CRIT output

will be asserted and CRIT1 in the configuration register will be

set. If and when the measured temperature in zone one

subsequently falls below the value programmed into nCRIT1,

the /CRIT output will be de-asserted and the CRIT1 bit in

CONFIG will be cleared. This action cannot be masked and

is completely independent of the settings of the mode bit and

interrupt mask bit. The host may poll the state of the /CRIT

output at any time by reading the configuration register. The

state of the CRIT1 bit exactly follows the state of the /CRIT

output. The states of /CRIT and CRIT1 do not change when

the MIC284 enters shutdown mode. Entering shutdown mode

stops A/D conversions, however, so their states will not

change while the device is shut down.

Polling

The MIC284 may either be polled by the host, or request the

host’s attention via the /INT pin.

In the case of polled

operation, the host periodically reads the contents of CONFIG

to check the state of the status bits. The act of reading

CONFIG clears the status bits. If more than one event that

sets a given status bit occurs before the host polls the

MIC284, only the fact that at least one such event has

occurred will be apparent to the host. For polled systems, the

interrupt mask bit should be set (IM = 1). This will disable

interrupts from the MIC284, and prevent the /INT pin from

sinking current. The host may poll the state of the /CRIT

output at any time by reading the configuration register. The

state of the CRIT1 bit exactly follows the state of the /CRIT

output.

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