PIC18F010 datasheet(139/176 Pages) MICROCHIP

139 / 176 page

 2001 Microchip Technology Inc.

Preliminary

DS41142A-page 137

PIC18F010/020

TSTFSZ

Test f, skip if 0

Syntax:

[ label ] TSTFSZ f [,a]

Operands:

≤ f ≤ 255

∈ [0,1]

Operation:

skip if f = 0

Status Affected:

None

Encoding:

0110

011a

ffff

Description:

If ’f’ = 0, the next instruction,

fetched during the current instruc-

tion execution, is discarded and a

NOP

is executed making this a two-

cycle instruction. If ’a’ is 0, the

Access Bank will be selected, over-

riding the BSR value. If ’a’ is 1, the

Bank will be selected as per the

BSR value.

Words:

Cycles:

1(2)

Note: 3 cycles if skip and followed

by a 2-word instruction

Q Cycle Activity:

Decode

Read

Process

Data

operation

If skip:

operation

If skip and followed by 2-word instruction:

operation

Example:

HERE

TSTFSZ

CNT

NZERO

ZERO

Before Instruction

Address (HERE)

After Instruction

If CNT

0x00,

Address (ZERO)

If CNT

≠

0x00,

Address (NZERO)

XORLW

Exclusive OR literal with WREG

Syntax:

[ label ] XORLW k

Operands:

≤ k ≤ 255

Operation:

(WREG) .XOR. k

→ WREG

Status Affected:

N,Z

Encoding:

0000

1010

kkkk

Description:

The contents of WREG are

XOR’ed with the 8-bit literal 'k'.

The result is placed in WREG.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

literal ’k’

Process

Data

Write to

WREG

Example:

XORLW 0xAF

Before Instruction

WREG

0xB5

After Instruction

WREG

0x1A

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