LM2698 datasheet(13/25 Pages) TI

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ADC =

118

* R

LOAD(MIN)

RDSON(MIN)

(1 - DMAX)

1 +

0.144 * fSL

VINRDSON(MIN)

+ 1 + DMAX

(1 - DMAX)

3 R

LOAD(MIN)

2LfS

RC =

10 x ADCCC1ZP1(max)ZP2

RHP(MIN)

Zz2 = 10 x ZP1(max)

(rad/s),

ADCZP2

ZRHP(MIN)

CC1RC

Set ZP2 = 2S(40)(rad/s)

(rad/s)

CC1ROUT

ZRHP(MIN) =

RLOAD(MIN)

(rad/s)

(

VIN(MIN)

VOUT

RLOAD(MIN) =

IOUT(MAX)

VOUT

COUTRLOAD(MIN)

ZPI(MAX)|

(rad/s)

LM2698

www.ti.com

SNVS153E – MAY 2001 – REVISED APRIL 2013

Quick Compensator Design

Calculate:

(14)

where,

(15)

(16)

(17)

where ROUT = 875kΩ

Choose CC1 = 4.7nF

(18)

Choose

(19)

Where,

(20)

If the output capacitor is of high ESR (0.1

Ω or higher), it may be necessary to use CC2. A rule of thumb is that if

1/(2

πCOUTESR) (Hz) is lower than fS/2 (Hz), CC2 should be used. Choose CC2 such that:

(RC + ROUT)(COUTESR) / (RCROUT) (F)

(21)

where ROUT = output impedance of the error amp (875 kΩ).

Improving Transient Response Time

The above compensator design provides a loop gain with high phase margin for a large stability margin. The

transient response time of this loop is limited by the lower mid-frequency gain necessary to achieve a high phase

margin. If it is desired to increase the transient response time, CC1 may be decreased. Decreasing CC1 by 2x, 4x,

and 6x will yield increasingly shorter transient response times, however the loop phase margin will become

progressively lower as CC1 is decreased. When optimizing the loop gain for transient response time, it is

recommended to keep the phase margin above 40°.

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