LM3280

SNOSAU4B – OCTOBER 2006 – REVISED FEBRUARY 2013

www.ti.com

PWM MODE

While in PWM (Pulse Width Modulation) mode, the output voltage is regulated by switching at a constant

frequency (2MHz typ.) and then modulating the energy per cycle to control power to the load. Energy per cycle is

set by modulating the PFET switch on-time pulse width to control the peak inductor current. This is done by

comparing the PFET drain current to a slope-compensated reference current generated by the error amplifier. At

the beginning of each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When

the current sense signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch

and turns on the NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the

output down, the error amplifier output increases, which allows the inductor current to ramp higher before the

comparator turns off the PFET. This increases the average current sent to the output and adjusts for the increase

in the load. The minimum on-time of PFET in PWM mode is 50ns (typ.).

BYPASS MODE

The buck converter contains an internal PFET switch for bypassing the PWM DC-DC converter during Bypass

mode. In Bypass mode, this PFET is turned on to power the PA directly from the battery for maximum RF output

power. Bypass mode is more efficient than operating in PWM mode at 100% duty cycle because the resistance

of the bypass PFET is less than the series resistance of the PWM PFET and inductor. This translates into higher

voltage available on the output in Bypass mode, for a given battery voltage. The part can be placed in bypass

mode by sending BYP pin high. This is called Forced Bypass Mode and it remains in bypass mode until BYP pin

goes low.

Alternatively the part can go into Bypass mode automatically. This is called Auto-bypass mode or Automatic

Bypass mode. The bypass switch turns on when the difference between the input voltage and programmed

output voltage is less than 250mV (typ.) for more than the bypass delay time of 15µs (typ.). The bypass switch

turns off when the input voltage is higher than the programmed output voltage by 450mV (typ.) for longer than

the bypass delay time. The bypass delay time is provided to prevent false triggering into Automatic Bypass mode

automatically when the input voltage gets close to the output voltage, typical scenario of a discharging battery. It

is also turned off automatically when the input voltage rises, typical scenario of a charger connected. Another

recommended to connect BYPOUT pin directly to the output capacitor with a separate trace and not to the FB

pin.

OPERATING MODE SELECTION CONTROL

The BYP digital input pin is used to select between PWM/Auto-bypass and Bypass operating mode. Setting BYP

pin high (>1.2V) places the device in Forced Bypass mode. Setting BYP pin low (<0.4V) or leaving it floating

places the device in PWM/Auto-bypass mode.

Bypass and PWM operation overlap during the transition between the two modes. This transition time is

approximately 31µs when changing from PWM to Bypass mode, and 15µs when changing from Bypass to PWM

mode. This helps prevent under or overshoots during the transition period between PWM and Bypass modes.

DYNAMICALLY ADJUSTABLE OUTPUT VOLTAGE

The LM3280 buck converter features dynamically adjustable output voltage to eliminate the need for external

This feature is useful in PA applications where peak power is needed only when the handset is far away from the

base station or when data is being transmitted. In other instances, the transmitting power can be reduced. Hence

the supply voltage to the PA can be reduced, promoting longer battery life. See BUCK CONVERTER SETTING

THE OUTPUT VOLTAGE for further details.

OVER VOLTAGE PROTECTION

The buck converter has an over voltage comparator that prevents the output voltage from rising too high, when

the device is left in PWM mode under light-load conditions, during output voltage steps, or during startup. When

the output voltage rises to 330mV over its target, the OVP comparator inhibits PWM operation to skip pulses until

the output voltage returns to the target. During the over voltage protection mode, both the PWM PFET and the

NFET synchronous rectifier are off. When the part comes out of the over voltage protection mode, the NFET

synchronous rectifier remains off for approximately 3.5µs to avoid inductor current going negative.

16

Submit Documentation Feedback

Copyright © 2006–2013, Texas Instruments Incorporated

Product Folder Links: LM3280