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LM3280 Datasheet(PDF) 19 Page - Texas Instruments |
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LM3280 Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 27 page ![]() LM3280 www.ti.com SNOSAU4B – OCTOBER 2006 – REVISED FEBRUARY 2013 If a higher value inductor is used the LM3280 may become unstable and exhibit large under or over shoot during line, load and VCON transients. If smaller inductance value is used, slope compensation maybe insufficient causing sub-harmonic oscillations. The device has been tested with inductor values in the range 1.55 μH to 3.1μH to account for inductor tolerances. For low-cost applications, an un-shielded bobbin inductor can be used. For noise-critical applications, an un- shielded or shielded-bobbin inductor should be used. A good practice is to layout the board with footprints accommodating both types for design flexibility. This allows substitution of an un-shielded inductor, in the event that noise from low-cost bobbin models is unacceptable. Saturation occurs when the magnetic flux density from current through the windings of the inductor exceeds what the inductor’s core material can support with a corresponding magnetic field. This can cause poor efficiency, regulation errors or stress to a DC-DC converter like the LM3280. CAPACITOR SELECTION The LM3280 is designed to be used with ceramic capacitors. Use a 10µF ceramic capacitor for the power input, a 4.7µF ceramic capacitor for the buck converter output, and a 1µF ceramic capacitor for the LDO and the signal input. Ceramic capacitors such as X5R, X7R and B are recommended for both filters. These provide an optimal balance between small size, cost, reliability and performance for cell phones and similar applications. Table 2 lists suggested capacitors and suppliers. Table 2. Suggested Capacitors and Their Suppliers Model Size (EIA) Vendor C1608X5R0J475M 1608 (0603) TDK C2012X5R0J106M 2012 (0805) TDK GRM188B10J105KA01 1608 (0603) Murata LMK107BJ105KA 1608 (0603) Taiyo-Yuden C1608JB1C105K 1608 (0603) TDK The DC bias characteristics of the capacitor must be considered when making the selection. If smaller case size such as 1608 (0603) is selected, the DC bias could reduce the cap value by as much as 40%, in addition to the 20% tolerances and 15% temperature coefficients. Request DC bias curves from manufacturer when making selection. The buck converter has been designed to be stable with output capacitors as low as 3 μF to account for capacitor tolerances. The LDO has been done with output capacitors as low as 0.5µF. These values include DC bias reduction, manufacturing tolerances and temp coefficients. The input filter capacitor supplies AC current drawn by the PFET switch of the LM3280 in the first part of each cycle and reduces the voltage ripple imposed on the input power source. A 1µF capacitor is also recommended close to SVIN pin. The output filter capacitor absorbs the AC inductor current, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR (Equivalent Series Resistance) to perform these functions. The ESR of the filter capacitors is generally a major factor in voltage ripple. DSBGA PACKAGE ASSEMBLY AND USE Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow techniques, as detailed in National Semiconductor Application Note 1112. Refer to the section, Surface Mount Technology (SMD) Assembly Considerations. For best results in assembly, alignment ordinals on the PC board should be used to facilitate placement of the device. The pad style used with DSBGA package must be the NSMD (non-solder mask defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the solder-mask and pad overlap, from holding the device off the surface of the board and interfering with mounting. See Application Note 1112 for specific instructions how to do this. The 16-Bump package used for the LM3280 has 300 micron solder balls and requires 10.82 mil pads for mounting on the circuit board. The trace to each pad should enter the pad with a 90° entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 6-7 mil wide, for a section approximately 6 mil long or longer, as a thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is symmetry. This ensures the solder bumps on the LM3280 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps B4, C4 and D4. Because PVIN and PGND are typically connected to large copper planes, inadequate thermal relief can result in inadequate re-flow of these bumps. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: LM3280 |
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