TC1784 datasheet(30/123 Pages) INFINEON

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TC1784

PinningTC1784 Pin Configuration

Data Sheet

3-23

V 1.1.1, 2014-05

P5.5

I/O0 A1+/

Port 5 General Purpose I/O Line 5

IN45

GPTA0 Input 45

IN30

LTCA2 Input 30

MRST2A

SSC2 Master Receive Input (Master Mode)

OUT45

GPTA0 Output 45

OUT13

LTCA2 Output 13

MRST2

SSC2 Slave Transmit Output (Slave Mode)

P5.6

I/O0 A1+/

Port 5 General Purpose I/O Line 6

IN46

GPTA0 Input 46

IN31

LTCA2 Input 31

MTSR2A

SSC2 Slave Receive Input (Slave Mode)

OUT46

GPTA0 Output 46

OUT14

LTCA2 Output 14

MTSR2

SSC2 Master Transmit Output (Master Mode)

P5.7

I/O0 A1+/

Port 5 General Purpose I/O Line 7

IN47

GPTA0 Input 47

SCLK2A

SSC0 Clock Input (Slave Mode)

OUT47

GPTA0 Output 47

OUT15

LTCA2 Output 15

SCLK2

SSC0 Clock Output (Master Mode)

P5.8

I/O0 A2/

Port 5 General Purpose I/O Line 8

RDATA0B

MLI0 Receiver Data Input B

Reserved

TXDA1

E-Ray Channel A transmit Data Output

OUT89

LTCA2 Output 89

P5.9

I/O0 A2/

Port 5 General Purpose I/O Line 9

RVALID0B

MLI0 Receiver Data Valid Input B

Reserved

TXDB1

E-Ray Channel B transmit Data Output

OUT90

LTCA2 Output 90

Table 3-1

Pin Definitions and Functions (PG-LFBGA-292-6)

(cont’d)

Symbol

Ctrl.

Type Function

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