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AR0330 Datasheet(PDF) 63 Page - ON Semiconductor

Part # AR0330
Description  CMOS Digital Image Sensor
PDF  77 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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AR0330 Datasheet(HTML) 63 Page - ON Semiconductor

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AR0330_DS Rev. U Pub. 4/15 EN
63
©Semiconductor Components Industries, LLC,2015.
AR0330: 1/3-Inch CMOS Digital Image Sensor
Two-Wire Serial Register Interface
Sequential READ, Start From Random Location
This sequence (Figure 44) starts in the same way as the single READ from random loca-
tion (Figure 42). Instead of generating a no-acknowledge bit after the first byte of data
has been transferred, the master generates an acknowledge bit and continues to
perform byte READs until “L” bytes have been read.
Figure 44:
Sequential READ, Start From Random Location
Sequential READ, Start From Current Location
This sequence (Figure 45) starts in the same way as the single READ from current loca-
tion (Figure 43 on page 62). Instead of generating a no-acknowledge bit after the first
byte of data has been transferred, the master generates an acknowledge bit and
continues to perform byte READs until “L” bytes have been read.
Figure 45:
Sequential READ, Start From Current Location
Single WRITE to Random Location
This sequence (Figure 46) begins with the master generating a start condition. The slave
address/data direction byte signals a WRITE and is followed by the HIGH then LOW
bytes of the register address that is to be written. The master follows this with the byte of
write data. The WRITE is terminated by the master generating a stop condition.
Figure 46:
Single WRITE to Random Location
Slave Address
0
S
Sr
A Reg Address[15:8]
Read Data
Read Data
A
Reg Address[7:0] A
Read Data
Slave Address
Previous Reg Address, N
Reg Address, M
M+1
M+2
M+1
M+3
A
1
Read Data
Read Data
M+L-2
M+L-1
M+L
A P
A
A
A
A
Read Data
Read Data
Previous Reg Address, N
N+1
N+2
N+L-1
N+L
Read Data
Slave Address
A
1
Read Data
A P
S
A
A
A
Slave Address
0
S
A Reg Address[15:8]
A
Reg Address[7:0]
A
P
Previous Reg Address, N
Reg Address, M
M+1
A
A
Write Data



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