KAI-1010 datasheet(4/27 Pages) ONSEMI

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KAI−1010

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line is transferred into the B HCCD by clocking

fH1A to

a low state, and

fH1B to a high state while holding fH2 low.

After

fH1A is returned to a high state, the next line can be

transferred into the A HCCD. After this clocking sequence,

both HCCDs are read out in parallel.

The charge capacity of the horizontal CCDs is slightly

more than twice that of the vertical CCDs. This feature

allows the user to perform two-to-one line aggregation in the

charge domain during V-to-H transfer. This device is also

equipped with a fast dump feature that allows the user to

selectively dump complete lines (or rows) of pixels at a time.

This dump, or line clear, is also accomplished during the

V-to-H transfer time by clocking the fast dump gate.

Figure 3. True 2 Phase CCD Cross Section

Pixel PN

Pixel PN+1

−V

Direction of Transfer

Figure 4. Output Structure

VDD

VOUTA

VOUTB

VSS & OG

FDA (N/C)

FDB (N/C)

VSUB

VWELL

HCCDA

HCCDB

KAI-1010 Datasheet(PDF) 4 Page - ON Semiconductor