LC87F6D64A

No.A1007-2/19

Minimum Bus Cycle Time

• 100ns (10MHz) VDD=3.0 to 5.5V

• 150ns (4MHz) VDD=2.5 to 5.5V

Note: The bus cycle time indicates ROM read time.

Minimum Instruction Cycle Time (tCYC)

• 300ns (10MHz) VDD=3.0 to 5.5V

• 750ns (4MHz) VDD=2.5 to 5.5V

Ports

• Input/output ports

Data direction programmable for each bit individually:

10 (P1n, P7n)

Data direction programmable in nibble units:

8 (P0n)

(When N-channel open drain output is selected, data can be input in bit units.)

• VFD output ports

Large current outputs for digits:

9 (S0/T0 to S8/T8)

Large current outputs for digits/segments:

7 (S9/T9 to S15/T15)

Digit/segment outputs:

8 (S16 to S23)

Segment outputs:

30 (S24 to S53)

• Oscillator pins:

2 (CF1/XT1, CF2/XT2)

• Reset pin:

1 (RES)

• Power supply:

4 (VSS1, VDD1 to VDD3)

• VFD power supply:

1 (VP)

VFD Automatic Display Controller

• Programmable segment/digit output pattern

Output can be switched between digit/segment waveform output

(pins 9 to 23 can be used for output of digit waveforms).

parallel-drive available for large current VFD.

• 16-step dimmer function available

Timers

• Timer 0: 16-bit timer/counter with capture register

Mode 0: 2 channel 8-bit timer with programmable 8-bit prescaler and 8-bit capture register

Mode 1: 8-bit timer with 8-bit programmable prescaler and 8-bit capture register

+ 8-bit counter with 8-bit capture register

Mode 2: 16-bit timer with 8-bit programmable prescaler and 16-bit capture register

Mode 3: 16-bit counter with 16-bit capture register

• Timer 4: 8-bit timer with 6-bit prescaler

• Timer 5: 8-bit timer with 6-bit prescaler

• Base Timer

1) The clock signal can be selected from any of the following.

Sub-clock (32.768kHz crystal oscillator), system clock, and prescaler output from timer 0

2) Interrupts can be selected to occur at one of five different times.

• Day and time counter

1) Using with a base timer, it can be used as 65000 day + minute + second counter.

SIO

• SIO 0: 8-bit synchronous serial interface

1) LSB first /MSB first function available

2) Internal 8-bit baud-rate generator (maximum transmit clock period 4/3 tCYC)

3) Consecutive automatic data communication

(1 to 256 bits (communication available for each bit) (stop and reopening available for each byte))

• SIO 1: 8-bit asynchronous/synchronous serial interface

Mode 0: Synchronous 8-bit serial IO (2-wire or 3-wire, transmit clock 2 to 512 tCYC)

Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8 to 2048 tCYC)

Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2 to 512 tCYC)

Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)