Pin Function Descriptions

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AX5031

6

3.

Pin Function Descriptions

3.1.

Pin List

Symbol

Pin(s)

Type

Description

VDD

1

P

Power supply, must be supplied with regulated voltage VREG

ANTP

2

A

Antenna output

ANTN

3

A

Antenna output

VDD

4

P

Power supply, must be supplied with regulated voltage VREG

NC

5

N

Not connected

NC

6

N

Not connected

SYSCLK

7

I/O

Default functionality: Crystal oscillator (or divided) clock output

Can be programmed to be used as a general purpose I/O pin

SEL

8

I

Serial peripheral interface select

CLK

9

I

Serial peripheral interface clock

MISO

10

O

Serial peripheral interface data output

NC

11

N

Not connected

MOSI

12

I

Serial peripheral interface data input

NC

13

N

Not connected

IRQ

14

I/O

Default functionality: Interrupt

Can be programmed to be used as a general purpose I/O pin

VDD_IO

15

P

Unregulated power supply

NC

16

N

Not connected

VREG

17

P

Regulated output voltage

VDD pins must be connected to this supply voltage

A 1µF low ESR capacitor to GND must be connected to this pin

NC

18

P

Not to be connected

CLK16P

19

A

Crystal oscillator input/output

CLK16N

20

A

Crystal oscillator input/output

GND

centre

pad

P

Ground on center pad of QFN

A = analog signal

I/O

= digital input/output signal

I

= digital input signal

N

= not to be connected

O =

digital output signal

P

= power or ground

All digital inputs are Schmitt trigger inputs, digital input and output levels are LVCMOS/LVTTL compatible and 5V

tolerant

.