| Electronic Components Datasheet Search |
|
MH88628 Datasheet(PDF) 3 Page - Mitel Networks Corporation |
|
|
|||||||||||||||||||||||||||||
MH88628 Datasheet(HTML) 3 Page - Mitel Networks Corporation |
|
3 / 16 page ![]() 2-201 Preliminary Information MH88628 20 N1 Network Balance Node 1(Input). 0.1 times the impedance between pins N1 and N2 must match the device’s input impedance, while 0.1 times the impedance between pins N1 and AGND is the device’s network balance impedance. This node is active only when NS is at logic high. This node may be terminated when not used (i.e., NS at logic low). 21 N2 Network Balance Node 2 (Output). See N1 for description. 22 Z900 Line Impedance 900 Ω Node. Connects to Z1 for a line impedance of 900Ω. This node should be left open circuit when not used. 23 Z1 Line Impedance Node 1 (Input). 0.1 times the times the impedance between pins Z1 and Z2 is the device’s line impedance. This node must always be connected. 24 Z2 Line Impedance Node 2 (Output). 0.1 times the times the impedance between pins Z1 and Z2 is the device’s line impedance. This node should be left open circuit when not used. 25 TX Transmit (Output). 4-Wire (AGND) referenced audio output. 26 RX Receive (Input). 4-Wire (AGND) referenced audio input. 27 GTX0 Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain. 28 GTX1 Transmit Gain Node 1. A resistor to AGND provides transmit gain adjustment. 29 GRX0 Receive Gain Node 0. Connects to GRX1 for 0dB gain. 30 GRX1 Receive Gain Node 1. A resistor to AGND provides receive gain adjustment. 31 ACRI AC Ringing Voltage Input. A 1.5Vrms 20Hz signal is applied to this input. 32 Z600 Line Impedance 600 Ω Node (Output). Connects to Z1 for a line impedance of 600 Ω. This pin should be left open circuit when not used. 33 NS Network Balance Setting (Input). The logic level at NS selects the network balance impedance. A logic 0 enables an internal balance equivalent to the input impedance (Zin). While a logic 1 enables an external balance 0.1 times the impedance between pins N1 and AGND balanced to 0.1 times the impedance between pins N1 and N2. The impedance between N1 and N2 must be equivalent to 10 times the input impedance (Zin). 34 SHK Off-Hook Indication (Output). A logic low output indicates when the subscriber equipment has gone Off-Hook. 35 UD Unbalance Detect (Output). A log IC low output indicates when the DC current flow in the Tip and Ring leads is unbalanced, indicating that the subscriber equipment has grounded the Ring lead. 36,37,38 IC Internal Connection. These pins are internally connected and must be left open 39 VEE Negative Supply Voltage. -5V dc. 40 VDD Positive Supply Voltage. +5V dc. Pin Description (Continued) Pin # Name Description |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |