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MT8976AP Datasheet(PDF) 17 Page - Mitel Networks Corporation |
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MT8976AP Datasheet(HTML) 17 Page - Mitel Networks Corporation |
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17 / 26 page ![]() ISO-CMOS MT8976 4-45 compatible equipment (see ANSI T1.102 and AT & T Technical Advisory #34). On the receive side the bipolar line signal is converted into a unipolar format by the line receiver circuit. The resulting split phase signals are input at the RxA and RxB pins on the MT8976. The signals are combined together to produce a composite return to zero signal, which is clocked into the device at RxD. An uncommitted nand gate in the MT8940/41 can be used for this purpose. The MT8976 can be interfaced to a high speed parallel bus or to a microprocessor using the MT8920B Parallel Access Circuit (STPA). Figure 11 shows the MT8976 interfaced to a parallel bus structure using two STPA‘s operating in modes 1 and 2. The first STPA operating in mode 2 (MMS=0, MS1=1, 24/32=0), routes data and/or voice information between the parallel telecom bus and the T1 or CEPT link via DSTi and DSTo. The second STPA, operating in mode 1 (MMS = 1 ) provides access from the signalling and link control bus to the MT8976 status and control channels. All signalling and link functions may be controlled easily through the STPA transmit RAM’s Tx0, Tx1, while status information is read at receive RAM Rx0. In addition, interrupts can be set up to notify the system in case of slips, loss of sync, alarms, violations, etc. Mitel also manufactures a thick film hybrid device, the MH89760/760B, which incorporates the line driver, receiver and clock extractor circuitry. A second SIP hybrid, the MH89761, provides the necessary equalization circuitry to condition the signal for transmission up to 655 feet over 22 AWG twisted pair. Note: the configurations shown in Figures 10 and 11 using the MT8940/41 may not meet specific jitter performance requirements. A more sophisticated PLL or line interface unit with transmit jitter attenuator may be required for applications designed to meet specific standards. Figure 11 - Using the MT8976 in a Parallel Bus Environment HIGH SPEED PARALLEL TELECOM BUS MT8920B (Mode 2) D0-D7 A0-A5 CS R/W OE MMS MS1 24/32 STo0 STi0 STo1 C4i F0i MT8976 D0-D7 A0-A5 CS DS R/W DTACK IRQ lACK MMS +5V +5V E8Ko RxD RxB RxA TxB TxA E1.5i C1.5i C2i F0i CSTi1 CSTo CSTi0 DSTo DSTi Clock Extractor Tx Line Driver Rx Line Receiver DIP SWITCH EQU MT8940/41 MT8940/ MT8941 CVb F0i C2o F0b C4b C8Kb 12.355/12.352 MHz Osc. MHz Osc. 16.388/16.384 • • • • • • • 1.544 STo0 STi0 STo1 C4i F0i MT8920B (Mode 1) SIGNALLING and LINK CONTROL BUS MH89761 MHz |
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