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MT8981DP Datasheet(PDF) 12 Page - Mitel Networks Corporation |
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MT8981DP Datasheet(HTML) 12 Page - Mitel Networks Corporation |
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12 / 14 page ![]() MT8981D ISO-CMOS 2-28 † Timing is over recommended temperature & power supply voltages ‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing. * High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel time taken to discharge CL. AC Electrical Characteristics† - Serial Streams (Figures 11, 14, 15 and 16) Characteristics Sym Min Typ‡ Max Units Test Conditions 1 O U T P U T S STo0/3 Delay - Active to High Z tSAZ 20 50 80 ns RL=1 KΩ*, CL=150 pF 2 STo0/3 Delay - High Z to Active tSZA 25 60 125 ns CL=150 pF 3 STo0/3 Delay - Active to Active tSAA 30 65 125 ns CL=150 pF 4 STo0/3 Hold Time tSOH 25 45 ns CL=150 pF 5 Output Driver Enable Delay tOED 45 125 ns RL=1 KΩ*, CL=150 pF 6 External Control Hold Time tXCH 050 ns CL=150 pF 7 External Control Delay tXCD 75 110 ns CL=150 pF 8 I N Serial Input Setup Time tSIS -40 -20 ns 9 Serial Input Hold Time tSIH 90 ns Figure 14 - Serial Outputs and External Control C4i 2.0V 0.8V STo0 to STo3 2.4V 0.4V STo0 to STo3 2.4V 0.4V STo0 to 2.4V 0.4V Bit Cell Boundary STo3 tSOH tSAZ tSZA tSOH tSAA * * Figure 15 - Output Driver Enable Figure 16 - Serial Inputs Bit Cell Boundaries C4i 2.0V 0.8V 2.0V 0.8V tSIS tSIH STi0 to STi3 ODE 2.0V 0.8V STo0 to STo3 2.4V 0.4V * tOED tOED * |
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