ISO-CMOS

MT8981D

2-19

12

14

8

C4i

4.096 MHz Clock (Input). ST-BUS bit cell boundaries lie on the alternate falling

edges of this clock.

13-

15

15-

17

9-11

A0-A2 Address 0 to 2 (Inputs). These are the inputs for the address lines on the

microprocessor interface.

16-

18

19-

21

13-

15

A3-A5 Address 3 to 5 (Inputs). These are the inputs for the address lines on the

microprocessor interface

19

22

16

DS

Data Strobe (Input). This is the input for the active high data strobe on the

microprocessor interface.

20

23

17

R/W

Read or Write (Input). This is the input for the read/write signal on the

microprocessor interface - high for read, low for write.

21

24

18

CS

Chip Select (Input). This is the input for the active low chip select on the

microprocessor interface.

22-

24

25-

27

19-

21

D7-D5 Data 7 to 5 (Three-state I/O Pins). These are the bidirectional data pins on the

microprocessor interface.

25-

29

29-

33

23-

27

D4-D0 Data 4 to 0 (Three-state I/O Pins). These are the bidirectional data pins on the

microprocessor interface.

30

34

28

Power Input. Negative Supply (Ground).

31-

34

35-

38

29-

32

IC

Internal Connections. Leave pins disconnected.

35

39

33

STo3 ST-BUS Output 3 (Three-state Outputs). These are the pins for the four 2048 kbit/s

ST-BUS output streams.

36-

38

41-

43

35-

37

STo2-

STo0

ST-BUS Output 2 to 0 (Three-state Outputs). These are the pins for the four 2048

kbit/s ST-BUS output streams.

39

44

38

ODE

Output Drive Enable (Input). If this input is held high, the STo0-STo3 output drivers

function normally. If this input is low, the STo0-STo3 output drivers go into their high

impedance state. NB: Even when ODE is high, channels on the STo0-STo3 outputs

can go high impedance under software control.

40

1

39

IC

Internal Connection. Leave pin disconnected.

Pin Description (continued)

Pin #

Name

Description

40

DIP

44

PLCC

44

QFP