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TMP175 Datasheet(PDF) 14 Page - Texas Instruments |
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TMP175 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 31 page ![]() Start By Master ACK By Device From Device NACK By Master Stop By Master 1 9 1 9 SDA SCL ALERT 0 0 0 1 1 0 0 R/W 1 0 0 1 0 0 0 S ta tu s Frame 1 SMBus ALERT Response Address Byte Frame 2 Slave Address Byte 1 Start By Master ACK By Device ACK By Device Frame 3 T Wire Slave Address Byte Frame 4 Data Byte 1 Read Register Start By Master ACK By Device ACK By Master From Device 1 9 1 9 1 9 1 9 SDA SCL 0 0 1 R/W 0 0 0 0 0 0 P1 P0 … … … … SDA (Continued) SCL (Continued) SDA (Continued) SCL (Continued) 1 0 0 1 0 0 0 0 0 0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Frame 5 Data Byte 2 Read Register Stop By Master ACK By Master From Device 1 9 D7 D6 D5 D4 D3 D2 D1 D0 wo- Frame 1 Two-Wire Slave Address Byte Frame 2 Pointer Register Byte TMP175-Q1, TMP75-Q1 SBOS759 – NOVEMBER 2015 www.ti.com NOTE: Address pins A0, A1, and A2 = 0. Figure 9. Two-Wire Timing Diagram for Read Word Format NOTE: Address pins A0, A1, and A2 = 0. Figure 10. Timing Diagram for SMBus ALERT 14 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TMP175-Q1 TMP75-Q1 |
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