5

SP5655

Table 1 Write data format (MSB transmitted first)

Byte 1

Byte 2

Byte 3

Byte 4

Byte 5

Address

Programmable divider

Programmable divider

Charge pump and test bits

I/O port control bits

1

CP

P6

0

T1

P5

0

T0

P4

0

TS2

P3

MA0

TS0

X

MA1

TS1

X

A

A

A

A

A

MSB

1

0

1

P7

LSB

0

OS

P0

Fig. 3 Data formats

A

:

Acknowledge bit

MA1, MA0

:

Variable address bits (see Table 4)

CP

:

Charge Pump current select

T1

:

Test mode selection

T0

:

Charge pump disable

TS2, TS1, TS0

:

Operation mode control bits (see Table 5)

OS

:

Varactor drive Output disable Switch

P7, P6, P5, P4, P3, P0 :

Control output port states

POR

:

Power On Reset indicator

FL

:

Phase lock detect flag

I2, I1, I0

:

Digital information from ports P7, P5 and P4 respectively

A2, A1, A0

:

5-level ADC data from P6 (see Table 3)

X

:

Don’t care

Table 2 Read data format

1

POR

1

A0

Byte 1

Byte 2

Address

Status byte

1

FL

0

I2

0

I1

0

I0

MA0

A1

MA1

A2

A

A

Address select input voltage

Always valid

Table 3 ADC levels

MA0

0

1

0

1

MA1

0

0

1

1

Table 4 Address selection

Voltage input to P6

A1

0

1

1

0

0

A2

1

0

0

0

0

A0

0

1

0

1

0

T1

0

0

1

1

1

1

1

TS2

X

X

0

0

1

1

1

TS1

X

X

0

1

0

0

1

TS0

0

1

X

X

0

1

X

Operation mode description

Normal operation, test modes disabled, reference divider ratio = 1024

Normal operation, test modes disabled, reference divider ratio = 512

Charge pump source (down). Status bit FL set to 0

Charge pump sink (up). Status bit FL set to 1

Ports P4, P5, P6, P7set to state X

Table 5 Operation modes

NOTES

X = don’t care

For further details of test modes, see Table 6