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ISO5852S Datasheet(PDF) 3 Page - Texas Instruments |
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ISO5852S Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 37 page ![]() 1 16 2 3 4 5 6 7 8 15 14 13 12 11 10 9 DESAT VEE2 VCC2 GND2 VEE2 VCC1 GND1 RDY IN- IN+ GND1 FLT RST OUTH OUTL CLAMP ISO5852S www.ti.com SLLSEQ0A – AUGUST 2015 – REVISED SEPTEMBER 2015 5 Description (continued) When the IGBT is turned off during normal operation with bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low impedance path preventing IGBT to be dynamically turned on during high voltage transient conditions. The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input side and output side supplies. If either side has insufficient supply the RDY output goes low, otherwise this output is high. The ISO5852S is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to 125°C ambient. 6 Pin Configuration and Function DW Package 16-Pin SOIC Top View Pin Functions PIN I/O DESCRIPTION NAME NO. VEE2 1, 8 - Output negative supply. Connect to GND2 for Unipolar supply application. DESAT 2 I Desaturation voltage input GND2 3 - Gate drive common. Connect to IGBT emitter. OUTH 4 O Positive gate drive voltage output VCC2 5 - Most positive output supply potential. OUTL 6 O Negative gate drive voltage output CLAMP 7 O Miller clamp output GND1 9, 16 - Input ground IN+ 10 I Non-inverting gate drive voltage control input IN- 11 I Inverting gate drive voltage control input RDY 12 O Power-good output, active high when both supplies are good. FLT 13 O Fault output, low-active during DESAT condition RST 14 I Reset input, apply a low pulse to reset fault latch. VCC1 15 - Positive input supply (2.25-V to 5.5-V) Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: ISO5852S |
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