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SM8702AM Datasheet(PDF) 7 Page - Nippon Precision Circuits Inc |
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SM8702AM Datasheet(HTML) 7 Page - Nippon Precision Circuits Inc |
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7 / 16 page ![]() SM8702AM NIPPON PRECISION CIRCUITS—7 AC Electrical Characteristics CPU clock characteristics 1 Ta = 0 to 70°C, VDD = 3.3V ± 5%, VDDL = 2.5V ± 5%, VSS = 0V, fX’tal = 14.318MHz, CL = 20pF unless other- wise noted. CPU clock characteristics 2 Ta = 0 to 70°C, VDD = VDDL = 3.3V ± 5%, VSS = 0V, fX’tal = 14.318MHz, CL = 20pF unless otherwise noted. P arameter Symbol Condition Rating Unit min typ m a x Output clock rise time1 1. Design maximu m values, not 100% guaranteed. tr V OL = 0.4V → VOH = 2.0V transition time – – 2.0 ns Output clock fall time1 tf V OH = 2.0V → VOL = 0.4V transition time – – 2.0 ns Duty cycle Dt V T = 1.25V 4 5 5 0 5 5 % Output clock jitter1 tjc V T = 1.25V, rising edge Cycle-to-cycle jitter – – 2 5 0 ps Output clock skew 1 tskw V T = 1.25V, rising edge Between CPUCLK0 and CPUCLK1 – – 250 ps Clock frequency stabilize time1 tstb Cold star t Supply ON (VDD = 3.3V) until clock reaches specified frequency ––3 m s Output impedance2 2. Design estimate values, not 100% guaranteed. Z O V O = 0.5VDDL 1 0–9 0 Ω P arameter Symbol Condition Rating Unit min typ m a x Output clock rise time1 1. Design maximu m values, not 100% guaranteed. tr V OL = 0.4V → VOH = 2.4V transition time – – 2.5 ns Output clock fall time1 tf V OH = 2.4V → VOL = 0.4V transition time – – 2.5 ns Duty cycle Dt V T = 1.5V 4 5 5 0 5 5 % Output clock jitter1 tjc V T = 1.5V, rising edge Cycle-to-cycle jitter – – 2 5 0 ps Output clock skew 1 tskw V T = 1.5V, rising edge Between CPUCLK0 and CPUCLK1 – – 250 ps Clock frequency stabilize time1 tstb Cold star t Supply ON (VDD = 3.3V) until clock reaches specified frequency ––3 m s Output impedance2 2. Design estimate values, not 100% guaranteed. Z O V O = 0.5VDDL 1 0–6 0 Ω |
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