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SM8702AM Datasheet(PDF) 11 Page - Nippon Precision Circuits Inc

Part # SM8702AM
Description  Clock Generator IC
PDF  16 Pages
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Manufacturer  NPC [Nippon Precision Circuits Inc]
Direct Link  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM8702AM Datasheet(HTML) 11 Page - Nippon Precision Circuits Inc

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SM8702AM
NIPPON PRECISION CIRCUITS—11
FUNCTIONAL DESCRIPTION
Mode Setting Overview
There are 2 methods that can be used to set the frequency and clock output start/stop operating modes.
s
Using external inputs (pins 7, 17, 18, 25, 26, 46) or,
s
Using data read in from an I2C serial interface.
The default state is where the operating state is set by external pin control. Thus, the output frequency can be
set by FS[0:2] (pins 25, 26, 46). Note that the SSCG function is OFF in this case. If the I2C serial data byte 0
bit 3 is set to 1, then the output frequency is determined by data using the I2C interface. Then, the Spread Spec-
trum function (SSCG) can be selected using I2C data. However, if mode settings using I2C data and external
pin control conflict or overlap, the mode settings dictated by I2C data have precedence over external pin con-
trol.
During normal operation, pins 17 and 18 can function as SDRAM clock outputs (desktop mode) or they can
function as CPUCLK output stop control and PCICLK output stop control (mobile mode), depending on the
state of MODE (pin 7) when power is first applied.
In addition to output frequency settings, other operating mode settings which can be controlled by I2C serial
data include SSCG operation and mode, and output pin grouping enable/disable switching.
Hardware Frequency Selection
When power is applied, the frequency setting is controlled by FS[0:2] when byte 0 bit 3 is set to 0. Note that if
byte 0 bit 3 is set to 1, the frequency is selected by bits 4 to 6 in the same manner as inputs FS0 to FS2.
Mode and Power Management Inputs
The SM8702AM supports 2 operating modes, desktop mode and mobile mode, selected by MODE (pin 7).
If MODE is HIGH when power is first applied, desktop mode is selected. In this mode, pins 17 and 18 function
as SDRAM clock outputs, SDRAM11 and SDRAM10, respectively.
If MODE is LOW when power is first applied, mobile mode is selected. In this mode, pins 17 and 18 function
as the CPU clock (CPUCLK[0:1]) and PCI clock (PCICLK[0:4]) output stop control signal inputs,
CPU_STOP# and PCI_STOP#, respectively. This function is used mainly to reduce power consumption.
Inputs
Output frequency
FS2
FS1
FS0
CPUCLK
[MHz]
PCICLK
[MHz]
HIGH
HIGH
HIGH
100.2
33.4
HIGH
HIGH
L O W
1 3 3
33.2
HIGH
L O W
HIGH
112.1
37.3
HIGH
L O W
L O W
1 0 3
34.3
L O W
HIGH
HIGH
66.5
33.2
L O W
HIGH
L O W
83.3
41.6
L O W
L O W
HIGH
74.9
37.4
L O W
L O W
L O W
94.7
31.6
MODE
Pin 17
Pin 18
Mode
HIGH
SDRAM11
SDRAM10
Desktop mode
Pins 17 and 18 are outputs.
L O W
CPU_STOP#
PCI_STO P #
Mobile mode
Pins 17 and 18 are inputs.



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