AP22800

Document number: DS36046 Rev. 3 - 2

9 of 14

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January 2015

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AP22800

Application Information

Theory of Operation

The AP22800 is a load switch that can be used to isolate or power-down part of a system in order to reduce power consumption, particularly in

battery-powered devices. The NMOS pass element in the AP22800 is turned on when EN pin is pulled high. This enables the internal charge

pump, which then increases the voltage on the SS pin and provides an overdrive on the gate of the N-channel pass switch.

When the voltage on the gate of the pass switch is around 1.6 times greater than VIN, power is deemed to be good, and the Power Good (PG)

output is pulled high via an external pull-up resistor. The rise-time of the switch is controlled by the value of the capacitor on the SS pin.

When EN is pulled low, the NMOS pass switch turns off and isolates VOUT from VIN. In addition, PG is pulled to ground to indicate that the power

is no longer good. The DIS pin keeps VOUT grounded while EN is low. The fall time on VOUT is largely controlled by the value of the discharge

resistor and the capacitance on the output.

Input and Output Voltage

The Input Voltage (VIN) should be between 1.5V and 5.5V. With the switch activated, the Output Voltage (VOUT) will be the input voltage minus

the voltage drop across the device.

Enable

The GPIO compatible EN input allows the output current to be switched on and off. A high signal (switch on) should be at least 1V, and a low

signal (switch off) no higher than 0.5V. The EN pin should not be left floating. It is advisable to hold EN low when applying or removing power.

Power Good

The PG output is an open drain output that indicates when the pass switch is enhanced enough to deliver current to the load. When the gate

voltage rises to VIN

the pass switch reaches 8V, thus, providing an overdrive of 3V. PG is pulled low when power is deemed not to be good.

PG can be pulled up to any voltage to a maximum of 5.5V, although it is recommended to utilize VOUT with a resistor greater than 5

0kΩ. The

advantage of pulling up PG to VOUT is that when EN is low, VOUT is also grounded. Thus, no power is wasted in the pull-up resistor.

If this feature is not required, then PG pin can be left floating.

Input and Output Capacitors

The input and output capacitors should be placed as close to VIN and VOUT pins as possible. The output capacitor should not be greater than the

input capacitor, otherwise, current may flow backwards through the device after turn

off. Typically, a 10μF input capacitor and a 1μF output

capacitor should be placed close to VIN and VOUT pins.