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SI5347 Datasheet(PDF) 39 Page - Silicon Laboratories |
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SI5347 Datasheet(HTML) 39 Page - Silicon Laboratories |
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39 / 59 page ![]() Si5347/46 Rev. 1.1 39 5.8.3. LVCMOS Output Terminations LVCMOS outputs are dc-coupled as shown in Figure 26. Figure 26. LVCMOS Output Terminations 5.8.4. Output Signal Format The differential output amplitude and common mode voltage are both fully programmable and compatible with a wide variety of signal formats, including LVDS and LVPECL. In addition to supporting differential signals, any of the outputs can be configured as LVCMOS (3.3 V, 2.5 V, or 1.8 V) drivers providing up to 20 single-ended outputs or any combination of differential and single-ended outputs. 5.8.5. Differential Output Amplitude Modes There are two selectable differential output amplitude modes: normal and low power. Each output can support a unique mode. Differential Normal Mode: When an output driver is configured in normal amplitude mode, its output amplitude is selectable as one of 8 settings ranging from 130 mVpp_se to 920 mVpp_se in increments of 100 mV. The output impedance in the normal mode is 100 differentialAny of the ac-coupled terminations shown in Figure 25 are supported in this mode. Differential Low Power Mode: When an output driver is configured in low power mode, its output amplitude is configurable as one of 8 settings ranging from 200 mVpp_se to 1600 mVpp_se in increments of 200 mV. The output driver is in high impedance mode and supports standard 50 PCB traces. Any of the ac-coupling terminations shown in Figure 25 are supported in this mode. 5.8.6. Programmable Common Mode Voltage For Differential Outputs The common mode voltage (VCM) for the differential normal and low power modes is programmable in 100 mV increments from 0.7 V to 2.3 V depending on the voltage available at the output’s VDDO pin. Setting the common mode voltage is useful when dc-coupling the output drivers. 5.8.7. LVCMOS Output Impedance Selection Each LVCMOS driver has a configurable output impedance to accommodate different trace impedances and drive strengths. A source termination resistor is recommended to help match the selected output impedance to the trace impedance. There are three programmable output impedance selections for each VDDO options as shown in Table 15. Note that selecting a lower source impedance may result in higher output power consumption. Table 15. Typical Output Impedance (ZS) CMOS_DRIVE_Selection VDDO OUTx_CMOS_DRV=1 OUTx_CMOS_DRV=2 OUTx_CMOS_DRV=3 3.3 V 38 30 22 2.5 V 43 35 24 1.8 V — 46 31 3.3 V, 2.5 V, 1.8 V LVCMOS VDDO = 3.3 V, 2.5 V, 1.8 V 50 Rs 50 Rs OUTx OUTx Si5347/46 |
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