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LTC2387 Datasheet(PDF) 2 Page - Linear Technology |
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LTC2387 Datasheet(HTML) 2 Page - Linear Technology |
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2 / 8 page ![]() 2 dc2290af DEMO MANUAL DC2290A Dc718 Quick start proceDure Connect the DC2290A to a DC718 USB High Speed Data Collection Board using edge connector J1. Connect the DC718 to a host PC with a standard USB A/B cable. Apply a low noise differential signal to J6 (AIN+) and J5 (AIN–). Note that the DC2290A requires a differential input signal of approximately 8.192V peak-to-peak to reach 0dBFS. If a differential signal source of this amplitude is not available use one of the recommended differential amplifier demo boards available to increase the signal level. For a clock source, apply a low jitter 10dBm sine wave or square wave to connector J4. See Table1 for maximum clock frequen- cies.NotethatJ4hasa50Ωterminationresistortoground. Run the PScope™ software (Pscope.exe version K73 or later) supplied with DC718 or download it from www. linear.com/software.Completesoftwaredocumentationis availablefromtheHelpmenu.Updatescanbedownloaded from the Tools menu. Check for updates periodically as new features may be added. The PScope software should recognize the DC2290A and configure itself automatically. Click the Collect button (Figure 2) to begin acquiring data. The Collect button then changes to Pause, which can be used to stop data acquisition. harDware setup SIGNAL CONNECTIONS J2: JTAG. Factory use only. J3: FPGA Program. Factory use only. J4: CLK IN. This input has a 50Ω termination resistor, and is intended to be driven by a low jitter, 10dBm sine or square wave. To achieve full AC performance of this part, the clock jitter should be kept under 2psRMS. This input is capacitively coupled so that the input clock can be either 0V to 3.3V or ±1.65V. This eliminates the need for level shifting. To run at the maximum conversion rate, apply the frequency specified in Table 1. J5: AIN– Input. This is the negative signal input. J6: AIN+ Input. This is the positive signal input. JUMPERS JP1: EEPROM. Factory use only. JP2: Lanes. Use this jumper to select either single lane or two lane data output mode from the LTC2387. The default setting is 1. The 1 setting clocks out all data on pin DA of the LTC2387. The 2 setting clocks out data alternately on pins DA and DB of the LTC2387. JP3: Test Pattern. Use this jumper to deliver a fixed repeat- ing test pattern from the LTC2387. The default setting is OFF. The output data will be –97796 if the jumper is in the ON position in 1 lane mode, and will be –52996 in 2 lane mode. JP4: ADC ON. Use this jumper to enable or disable the ADC. The default setting is ON. Table 1. DC2290A Assembly Options VERSION U1 PART NUMBER MAX CONVERSION RATE # OF BITS MAX CLOCK FREQUENCY DC2290A-A LTC2387CUH-18#PBF 15Msps 18 15MHz DC2290A-B LTC2387CUH-16#PBF 15Msps 16 15MHz DC2290A-C LTC2386CUH-18#PBF 10Msps 18 10MHz DC2290A-D LTC2386CUH-16#PBF 10Msps 16 10MHz DC2290A-E LTC2385CUH-18#PBF 5Msps 18 5MHz DC2290A-F LTC2385CUH-16#PBF 5Msps 16 5MHz |
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