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LAN7500I Datasheet(PDF) 46 Page - Microchip Technology |
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LAN7500I Datasheet(HTML) 46 Page - Microchip Technology |
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46 / 58 page ![]() Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller Datasheet DS00001734A-page 46 2014 Microchip Technology Inc Note 7.5 This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down and pull-up resistors add +/- 50uA per-pin (typical). Note 7.6 This is the total 5.5V input leakage for the entire device. Note 7.7 XI can optionally be driven from a 25MHz single-ended clock oscillator. Note 7.8 IEEE 802.ab Test Mode 1 Note 7.9 From 1/2 of average VOP, Test Mode 1 Note 7.10 IEEE 802.ab distortion processing Note 7.11 Measured at line side of transformer, line replaced by 100 (+/- 1%) resistor. Note 7.12 Offset from 16nS pulse width at 50% of pulse peak. Note 7.13 Measured differentially. Table 7.12 1000BASE-T Transceiver Characteristics PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Peak Differential Output Voltage VOP 670 820 mV Note 7.8 Signal Amplitude Symmetry VSS 1% Note 7.8 Signal Scaling VSC 2% Note 7.9 Output Droop VOD 73.1 % Note 7.8 Transmission Distortion 10 mV Note 7.10 Table 7.13 100BASE-TX Transceiver Characteristics PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Peak Differential Output Voltage High VPPH 950 - 1050 mVpk Note 7.11 Peak Differential Output Voltage Low VPPL -950 - -1050 mVpk Note 7.11 Signal Amplitude Symmetry VSS 98 - 102 % Note 7.11 Signal Rise and Fall Time TRF 3.0 - 5.0 nS Note 7.11 Rise and Fall Symmetry TRFS - - 0.5 nS Note 7.11 Duty Cycle Distortion DCD 35 50 65 % Note 7.12 Overshoot and Undershoot VOS -- 5 % Jitter 1.4 nS Note 7.13 |
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