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MEC1322 Datasheet(PDF) 343 Page - Microchip Technology |
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MEC1322 Datasheet(HTML) 343 Page - Microchip Technology |
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343 / 456 page ![]() 2014 - 2015 Microchip Technology Inc. DS00001719D-page 343 MEC1322 29.0 PS/2 INTERFACE 29.1 Introduction There are four PS/2 Ports in the MEC1322 which are directly controlled by the EC. The hardware implementation elim- inates the need to bit bang I/O ports to generate PS/2 traffic, however bit banging is available via the associated GPIO pins. 29.2 References No references have been cited for this feature. 29.3 Terminology There is no terminology defined for this section. 29.4 Interface This block is designed to be accessed externally via the pin interface and internally via a registered host interface. 29.5 Signal Description FIGURE 29-1: I/O DIAGRAM OF BLOCK TABLE 29-1: SIGNAL DESCRIPTION TABLE Name Direction Description PS2DAT INPUT/ OUTPUT Data from the PS/2 device PS2CLK INPUT/ OUTPUT Clock from the PS/2 device PS/2 Interface Interrupts Power, Clocks and Reset Host Interface Signal Description |
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