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MEC1322 Datasheet(PDF) 341 Page - Microchip Technology |
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MEC1322 Datasheet(HTML) 341 Page - Microchip Technology |
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341 / 456 page ![]() 2014 - 2015 Microchip Technology Inc. DS00001719D-page 341 MEC1322 28.10.5 LED UPDATE INTERVAL REGISTER This register has eight segment fields which provide the number of PWM periods between updates to current duty cycle. Segment field selection is decoded based on the segment index. The segment index equation utilized depends on the SYMMETRY bit in the LED Configuration Register Register) • In Symmetric Mode the Segment_Index[2:0] = Duty Cycle Bits[7:5] • In Asymmetric Mode the Segment_Index[2:0] is the bit concatenation of following: Segment_Index[2] = (FALLING RAMP TIME in Figure 28-3, "Clipping Example") and Segment_Index[1:0] = Duty Cycle Bits[7:6]. This register may be written at any time. Values written into the register are held in an holding register, which is trans- ferred into the actual register at the end of a PWM period if the Enable Update bit in the LED Configuration register is set to 1. Reads of this register return the current contents and not the value of the holding register. 11:8 UPDATE_STEP2 Amount the current duty cycle is adjusted at the end of every PWM period when the segment index is equal to 010. R/W 0h VCC1_ RESET 7:4 UPDATE_STEP1 Amount the current duty cycle is adjusted at the end of every PWM period when the segment index is equal to 001. R/W 0h VCC1_ RESET 3:0 UPDATE_STEP0 Amount the current duty cycle is adjusted at the end of every PWM period when the segment index is equal to 000. R/W 0h VCC1_ RESET Offset 10h Bits Description Type Default Reset Event 31:28 UPDATE_INTERVAL7 The number of PWM periods between updates to current duty cycle when the segment index is equal to 111b. 15=Wait 16 PWM periods … 0=Wait 1 PWM period R/W 0h VCC1_ RESET 27:24 UPDATE_INTERVAL6 The number of PWM periods between updates to current duty cycle when the segment index is equal to 110b. 15=Wait 16 PWM periods … 0=Wait 1 PWM period R/W 0h VCC1_ RESET 23:20 UPDATE_INTERVAL5 The number of PWM periods between updates to current duty cycle when the segment index is equal to 101b. 15=Wait 16 PWM periods … 0=Wait 1 PWM period R/W 0h VCC1_ RESET Offset 0Ch Bits Description Type Default Reset Event |
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