MEC1322 datasheet(344/456 Pages) MICROCHIP

344 / 456 page

MEC1322

DS00001719D-page 344

 2014 - 2015 Microchip Technology Inc.

29.6

Host Interface

The registers defined for the Keyboard Scan Interface are accessible by the various hosts as indicated in Section 29.15,

"EC-Only Registers".

29.7

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

29.7.1

POWER DOMAINS

29.7.2

CLOCK INPUTS

29.7.3

RESETS

29.8

Interrupts

This section defines the Interrupt Sources generated from this block.

29.9

Low Power Modes

The PS/2 Interface may be put into a low power state by the chip’s Power, Clocks, and Reset (PCR) circuitry.

The PS2 interface will only sleep while the PS2 is disabled or in Rx mode with no traffic on the bus.

29.10 Description

Each EC PS/2 serial channels use a synchronous serial protocol to communicate with the auxiliary device. Each PS/2

channel has Clock and Data signal lines. The signal lines are bi-directional and employ open drain outputs capable of

sinking 12m, as required by the PS/2 specification. A pull-up resistor, typically 10K, is connected to both lines. This

allows either the EC PS/2 logic or the auxiliary device to drive the lines. Regardless of the drive source, the auxiliary

TABLE 29-2:

POWER SOURCES

Name

Description

VCC1

The logic and registers implemented in this block are powered by this

power well.

TABLE 29-3:

CLOCK INPUTS

Name

Description

48 MHz Ring Oscillator

This is the clock source for PS/2 Interface logic.

2 MHz Clock

The PS/2 state machine is clocked using the 2 MHz clock.

TABLE 29-4:

RESET SIGNALS

Name

Description

VCC1_RESET

This signal resets all the registers and logic in this block to their default

state.

TABLE 29-5:

EC INTERRUPTS

Source

Description

PW2_x

Interrupt request to the Interrupt Aggregator for PS2 controller instance

, based on PS2 controller activity. Section 29.15.4, "PS2 Status

PS2_x_WK

Wake-up request to the Interrupt Aggregator’s wake-up interface for PS2

port x.

In order to enable PS2 wakeup interrupts, the pin control registers for the

PS2DAT pin must be programmed to Input, Falling Edge Triggered, non-

inverted polarity detection.

MEC1322 Datasheet(PDF) 344 Page - Microchip Technology

MEC1322 Datasheet(HTML) 344 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL