MEC1322 datasheet(364/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 364

 2014 - 2015 Microchip Technology Inc.

32.0 TRACE FIFO DEBUG PORT (TFDP)

32.1

Introduction

The TFDP serially transmits Embedded Controller (EC)-originated diagnostic vectors to an external debug trace system.

32.2

References

No references have been cited for this chapter.

32.3

Terminology

There is no terminology defined for this chapter.

32.4

Interface

This block is designed to be accessed externally via the pin interface and internally via a registered host interface.

32.5

Signal Description

The Signal Description Table lists the signals that are typically routed to the pin interface.

32.6

Host Interface

The registers defined for the Trace FIFO Debug Port (TFDP) are accessible by the various hosts as indicated in Section

32.11, "EC-Only Registers".

FIGURE 32-1:

I/O DIAGRAM OF BLOCK

TABLE 32-1:

SIGNAL DESCRIPTION TABLE

Name

Direction

Description

TFDP Clk

Output

Derived from EC Bus Clock.

TFDP Data

Output

Serialized data shifted out by TFDP Clk.

Signal Description

Trace FIFO Debug Port

(TFDP)

Interrupts

Power, Clocks and Reset

Host Interface

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