SC286 datasheet(15/20 Pages) SEMTECH

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SC286

To guarantee an operating junction temperature of less

than 125°C, Figure 3 shows the maximum allowable total

power loss versus temperature. The curve is based upon

the junction temperature of either channel reaching a

maximum of 125°C. Each channel of SC286 can support

up to 4A load current. Figure 4 shows the maximum

allowable power loss in channel B versus power loss in

channel A for a range of temperatures.

Ambient Temperature (°C)

2.5

3.5

4.5

105

VIN = 5V; VOUT = 1.2V

VIN = 5V; VOUT = 3.3V

VIN = 3.3V; VOUT = 1.2V

Figure 3 — Maximum allowable total loss versus

temperature for a maximum junction temperature of

125°C

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

Power Loss of Channel A (W)

TA = 55°C

TA = 25°C

TA = 70°C

TA = 85°C

Figure 4 — Maximum allowable power loss in channel

B versus power loss in channel A for a range of

temperatures (both channels same current)

Applications Information (continued)

Shut Down

When all CTL pins for a channel are low, the device will run

in shutdown mode, drawing less than 1μA from the input

power supply. The internal switches and band-gap voltage

will be immediately turned off.

Thermal Shutdown

The device has an independent thermal shutdown feature

for each channel to protect the SC286 if the junction tem-

perature exceeds 160°C. During thermal shutdown, the

on-chip power devices are disabled, floating the LX

output. When the temperature drops by 10°C, it will initi-

ate a soft start cycle to resume normal operation.

Under-Voltage Lockout

Under-Voltage Lockout (UVLO) is enabled when the input

voltage for each channel drops below the UVLO threshold.

This prevents the device from entering an ambiguous

state in which regulation cannot be maintained. Hysteresis

of approximately 300mV is included to prevent chattering

near the threshold. When the AVIN voltage rises back to

the turn-on threshold and CTL

X is high, the soft-start mode

is initiated.

Power Good

The power good (PGOOD) for each channel is an open-

drain output. When the output voltage for each channel

drops below 10% of the nominal voltage, the PGOOD pin

for that channel is pulled low after a 20μs delay. During

start-up, PGOOD will be asserted 1.8ms (typ.) after the

output voltage reaches 90% of the final regulation voltage.

The faults of over voltage, fold-back current limit mode

and thermal shutdown will force PGOOD low after a 20µs

delay. When recovering from a fault, PGOOD will be

asserted 2ms (typ.) after Vout reaches 90% of the final

regulation voltage.

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