TLE6262G datasheet(6/38 Pages) INFINEON

6 / 38 page

Final Data TLE 6262 G

version: 2.03 date: 2002-03-20

1.5

Circuit Description

The TLE 6262 G is a monolithic IC, which incorporates a failure tolerant low speed CAN-

transceiver for differential mode data transmission, a low dropout voltage regulator for

internal and external 5V supply as well as a SPI interface to control and monitor the IC.

Further there are integrated three high side switches, two low side switches, a window

watchdog circuit and a reset circuit. Both, the window watchdog and reset function are

referring to a time base that is programmable via an external resistor.

Figure 2 shows a block schematic diagram of the TLE 6262 G

Table 1: mode truth table

1) at low VCC output current only active when watchdog undercurrent function is not activated

2) a bus wake-up is monitored by setting the RxD output low

3) only active when selected via SPI

4) also active when driven via the PWM input

5) automatically disabled when a reset occurs

6) automatically disabled when a reset or watchdog reset respectively, occurs or the watchdog is disabled

by the undercurrent function

Feature

normal mode

Receive-only

mode

VBAT stand-by

mode

VCC

Reset

Watchdog

ON1)

SPI

CAN transmit

OFF

CAN receive

OFF2)

OUTHS 13) 4) 5)

OUTHS 23) 5)

OUTHS 33) 5)

OUTHS3-auto timing3) 5)

OFF

OUTLS 13) 6)

OUTLS 23) 6)

TLE6262G Datasheet(PDF) 6 Page - Infineon Technologies AG