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AD8284 Datasheet(PDF) 21 Page - Analog Devices |
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AD8284 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 28 page  Data Sheet AD8284 Rev. D | Page 21 of 28 Table 10. Memory Map Registers1 Addr. (Hex) Register Name Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Default Value Default Notes/ Comments Chip Configuration Registers 0x00 CHIP_PORT_CONFIG 0 LSB first 1 = on 0 = off (default) Soft reset 1 = on 0 = off (default) 1 1 Soft reset 1 = on 0 = off (default) LSB first 1 = on 0 = off (default) 0 0x18 Mirror the nibbles to correctly set LSB-first or MSB-first mode, regardless of shift mode. 0x01 CHIP_ID Chip ID Bits[7:0] (AD8284 = 0xAA, default) Read only The default is a unique chip ID, specific to the AD8284. This is a read-only register. Device Index and Transfer Registers 0xFF DEVICE_UPDATE X X X X X X X SW transfer 1 = on 0 = off (default) 0x00 Synchronously transfers data from the master shift register to the slave. Channel Functions Registers 0x08 GLOBAL_MODES Channel A buffer power 0 = power off 1 = power on (default) Channel B buffer power 0 = power off 1 = power on (default) Channel C buffer power 0 = power off 1 = power on (default) Channel D buffer power 0 = power off 1 = power on (default) Channel power- down 0 = power on (default) 1 = power off X Internal power- down mode 00 = chip run (default) 01 = full power- down 11 = reset 0xF0 Determines the power-down mode (global). 0x09 GLOBAL_CLOCK X X X X X X X Duty cycle stabilizer 1 = on (default) 0 = off 0x01 Turns the internal duty cycle stabilizer on and off (global). 0x0C FLEX_MUX_CONTROL X Power down unused channels 0 = PD power- down (default) 1 = power on X 0 = signal channel (A, B, C, D) on (default) 1 = AUX channel on 0 = use external pins (default) 1 = use internal registers 0 = all channels are off 1= selected channel is on (default) 00 = Channel A (default) 01 = Channel B 10 = Channel C 11 = Channel D 0x04 Sets which mux input channel is in use and whether to power down unused channels. 0x0D FLEX_TEST_IO User test mode 00 = off (default) 01 = on, single alternate 10 = on, single once 11 = on, alternate once Reset PN long gen 1 = on 0 = off (default) Reset PN short gen 1 = on 0 = off (default) Output test mode—see Table 11 0000 = off (default) 0001 = midscale short 0010 = +FS short 0011 = −FS short 0100 = checkerboard output 0101 = PN sequence long 0110 = PN sequence short 0111 = one-/zero-word toggle 1000 = user input 1001 = 1-bit/0-bit toggle 1010 = 1× sync 1011 = one bit high 1100 = mixed bit frequency (format determined by the OUTPUT_MODE register) 0x00 When this register is set, the test data is placed on the output pins in place of normal data. (Local, except for PN sequence.) |
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