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PI6C49016

Rev. B

06/25/13

PI6C49016

Low Power Networking Clock Generator

Serial Data Interface (SMBus)

PI6C49016 is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit ad-

dress and read/write bit as shown below.

Address Assignment

A6

A5

A4

A3

A2

A1

A0

W/R

1

1

0

1

0

0

1

0/1

How to Write

1 bit

8 bits

1

8 bits

1

8 bits

1

8 bits

1

8 bits

1

1 bit

Start

bit

D2H

Ack

Register

offset

Ack Byte Count

= N

Ack

Data Byte

0

Ack

…

Data Byte

N - 1

Ack

Stop

bit

Note:

1.

Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.

Byte 0: Spread Spectrum Control Register

Bit

Description

Type

Power Up

Condition

Output(s)

Affected

Notes

7

Spread Select for 100 MHz push-pull

PCI-Express clocks

RW

0

All 100MHz PCI-

Express outputs

0=spread off

1 = -0.5% down

spread

6

Reserved

R

-

-

-

5

Global PD_RESET bit. Enables or disables all

outputs.

RW

1

All outputs

0 = disabled

1 = enabled

4

Spread Select for 80MHz S1

RW

0

80M

See Table 1 on Page4

3

Spread Select for 80MHz S0

RW

1

2

OE for 66.66 MHz output

RW

1

66.66M

0 = disabled

1 = enabled

1

Reserved

R

-

-

-

0

OE for single-ended 125MHz

RW

1

Single-ended

125MHz

0 = disabled

1 = enabled

How to Read (M: abbreviation for Master or Controller; S: abbreviation for slave/clock)

1 bit

8 bits

1 bit

8 bits

1 bit

1 bit

8 bits

1 bit

8 bits

1 bit

8 bits

1 bit

…

8 bits

1 bit

1 bit

M:

Start

bit

M:

Send

"D2h"

S:

sends

Ack

M: send

starting

databyte

location:

N

S:

sends

Ack

M:

Start

bit

M:

Send

"D3h"

S:

sends

Ack

S:

sends

# of

data

bytes

that

will

be

sent:

X

M:

sends

Ack

S:

sends

start-

ing

data

byte

N

M:

sends

Ack

…

S:

sends

data

byte

N+X-1

M:

Not

Ac-

knowl-

edge

M:

Stop

bit

13-0102