ADC0851 datasheet(4/36 Pages) NSC

4 / 36 page

DC Electrical Characteristics (Continued)

The following specifications apply for VCC ea5VDC VREF ea45 VDC AGND e DGND e 0V and fOSC e 1 MHz (Rext e

316 kX Cext e 170 pF) unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply

at TA e TJ ea25 C

Parameter

Conditions

Typical

Limit

Units

(Note 5)

(Note 6)

(Limits)

DIGITAL CHARACTERISTICS

Logic ‘‘1’’ Input

VCC e 55V

V (Min)

Voltage VIH

Logic ‘‘0’’ Input

VCC e 45V

V(Max)

Voltage VIL

Logic ‘‘1’’ Input

VIN e VCC

0005

A (Max)

Current IIH

Logic ‘‘0’’ Input

VIN e 0V

0005

A (Max)

Current IIL

Logic ‘‘1’’ Output

VCC e 45V

Voltage VOH

IOUT eb360 mA

V (Min)

(Except INT)IOUT eb10 mA

V (Min)

Logic ‘‘0’’ Output

IOUT e 16 mA

V (Max)

Voltage VOL

VCC e 45V

TRI-STATE Output

CS e Logic ‘‘1’’ (5V)

Current (DO)

VOUT e 04V

A (Max)

VOUT e 5V

A (Max)

ISOURCE

VOUT Short to GND

mA (Min)

(Except INT)

ISINK

VOUT Short to VCC

mA (Min)

Supply Current ICC

fCLK e 1 MHz

mA (Max)

ADC0851 or ADC0858

fCLK e 2 MHz

(Note 10)

AC Electrical Characteristics

The following specifications apply for VCC ea5VDC VREF ea45 VDC AGND e DGND e 0V fCLK e 1 MHz tr e tf e

5 ns unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply at TA e TJ e 25 C

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 5)

(Note 6)

(Limits)

fCLK

Data Clock Frequency

MHz (Max)

Clock Duty Cycle

% (Min)

(Note 11)

% (Max)

tSET-UP

CS Falling Edge or

Data Input Valid to

ns (Min)

CLK Rising Edge

tHOLD

Data Input Valid after

ns (Min)

CLK Rising Edge

tPD1 tPD0

CLK Rising Edge to

CL e 100 pF

200

ns (Max)

Output Data Valid

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