ADC0851 datasheet(5/36 Pages) NSC

5 / 36 page

AC Electrical Characteristics (Continued)

The following specifications apply for VCC ea5VDC VREF ea45 VDC AGND e DGND e 0V fCLK e 1 MHz tr e tf e

5 ns unless otherwise specified Boldface limits apply for TA e TJ e TMIN to TMAX all other limits apply at TA e TJ e 25 C

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 5)

(Note 6)

(Limits)

t1H t0H

Rising Edge of CS to

C e 100 pF R e 2k

Data Output Hi-Z

(See TRI-STATE

200

ns (Max)

Test Circuits)

fOSC

Oscillator Clock Freq

Rext e 316 kX

MHz (Max)

(Analog Timing)

Cext e 170 pF

MHz (Min)

tEOC

CS to End of

OSC Clock

Conversion Delay

Periods

Min

Max

tConv

Conversion Time

OSC Clock

Periods

(Min)

(Max)

tCS-INT

CS to Interrupt Delay

120

ns (Max)

CIN

Capacitance of

5pF

Logic Input

COUT

Capacitance of

5pF

Logic Output

Note 1

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is

functional but do not guarantee specific performance limits For guaranteed specifications and test conditions see the Electrical Characteristics The guaranteed

specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not operated under the listed test

conditions

Note 2

All voltages are measured with respect to ground (AGND e DGND e 0V)

Note 3

All of the analog and digital input pins are internally diode clamped to the supply pins Should the applied voltage at any pin exceed the power supply

voltage the additional absolute value of current at that pin (caused by the forward biasing of the internal diodes) should be limited to 5 mA or less

Note 4

Human body model 100 pF discharged through a 15 kX resistor

Note 5

Typical specifications are at a25 C and represent the most likely parametric norm

Note 6

Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level)

Note 7

Total unadjusted error includes comparator offset ADC linearity and multiplexer error and is expressed in LSBs

Note 8

Two on-chip diodes are tied to each analog input The diodes will forward conduct for analog input voltages one diode drop below ground or one diode drop

above VCC Care should be exercised when operating the device at low supply voltages (eg VCC e 45V) because high analog inputs (5V) can cause the input

diodes to conduct especially at elevated temperatures This will cause errors for analog inputs near full scale The specification allows 50 mV forward bias of either

clamp diode Thus as long as VIN or VREF does not exceed the supply voltage by more than 50 mV the output code will be correct To achieve an absolute 0 VDC

to5VDC input voltage range will therefore require a minimum supply voltage of 4950 VDC

Note 9

Leakage current is measured with the oscillator clock disabled

Note 10

Measured supply current does not include the DAC ladder current

Note 11

A 40% to 60% clock duty cycle range ensures proper operation at all clock frequencies

ADC0851 Datasheet(PDF) 5 Page - National Semiconductor (TI)

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