ADC10321 datasheet(11/16 Pages) NSC

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Applications Information

1.0 THE ANALOG INPUT

The analog input of the ADC10321 is a switch (transmission

gate) followed by a switched capacitor amplifier. The capaci-

tance seen at the input changes with the clock level, appear-

ing as about 3pF when the clock is low, and about 5pF when

the clock is high. This small change in capacitance can be

reasonably assumed to be a fixed capacitance. Care should

be taken to avoid driving the input beyond the supply rails,

even momentarily, as during power-up.

The CLC409 has been found to be a good device to drive the

ADC10321 because of its low voltage capability, wide band-

width, low distortion and minimal Differential Gain and Differ-

ential Phase. The CLC409 performs best with a feedback re-

sistor of about 100 ohms.

Care should be taken to keep digital noise out of the analog

input circuitry to maintain highest noise performance.

2.0 REFERENCE INPUTS

Note: Throughout this data sheet reference is made to

REF+ and to VREF−. These refer to the internal voltage

across the reference ladder and are, nominally, V

REF+ S and

REF− S, respectively.

Figure 4 shows a simple reference biasing scheme with

minimal components. While this circuit might suffice for

some applications, it does suffer from thermal drift because

the external 750

Ω resistor at pins 1 and 2 will have a differ-

ent temperature coefficient than the on-chip resistors. Also,

the on-chip resistors, while well matched to each other, will

have a large tolerance compared with any external resistors,

causing the value of V

REF- to be quite variable.

The circuit of

Figure 5 is an improvement over the circuit of

Figure 4 in that both ends of the reference ladder are defined

with reference voltages. This reduces problems of high refer-

ence variability and thermal drift, but requires two reference

sources.

In addition to the usual V

REF+ and VREF− reference inputs,

the ADC10321 has two sense outputs for precision control of

the ladder voltages. These sense outputs (V

REF+ S and

REF− S) compensate for errors due to IR drops between the

source of the reference voltages and the ends of the refer-

ence ladder itself.

With the addition of two op-amps, the voltages at the top and

bottom of the reference ladder can be forced to the exact

value desired, as shown in

Figure 6.

DS100897-18

FIGURE 4. Simple, low component cournt reference biasing

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