300mV below the ground pins or 300mV above the supply

pins). Exceeding these limits on even a transient basis may

cause faulty or erratic operation. It is not uncommon for high

speed digital circuits (e.g., 74F and 74AC devices) to exhibit

undershoot that goes more than a volt below ground above

the power supply. A resistor of about 50 to 100

Ω in series

with the offending digital input will eliminate the problem.

Care should be taken not to overdrive the inputs of the

ADC12191 with a device that is powered from supplies out-

side the range of the ADC12191 supply. Such practice may

lead to conversion inaccuracies and even to device damage.

Attempting to drive a high capacitance digital data bus.

Capacitive loading on the digital outputs causes instanta-

neous digital currents to flow from the V

DGND I/O ground plane. These large charging current

spikes can couple into the analog section, degrading dy-

namic performance. Adequate bypassing and maintaining

separate analog and digital ground planes will reduce this

problem. The digital data outputs should be buffered (with

74ACQ541, for example). Dynamic performance can also be

improved by adding series resistors at each digital output,

close to the ADC12191, reducing the energy coupled back

into the converter output pins by limiting the output slew rate.

A reasonable value for these resistors is 47

Ω.

Using an inadequate amplifier to drive the analog input.

The analog input circuits of the ADC12191 place a switched

capacitor load on the input signal source. Therefore the am-

plifier used to drive the ADC12191 must have a low imped-

ance output and adequate bandwidth to avoid distortion of

the input signal.

Operating with the reference pins outside of the speci-

fied range. As mentioned in section 1.1, V

the range of 1.8V

≤ V

limits could lead to signal distortion.

Using a clock source with excessive jitter, using exces-

sively long clock signal trace, or having other signals

coupled to the clock signal trace. This will cause the sam-

pling interval to vary, causing excessive output noise and a

reduction in SNR performance.

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